mb/google/drallion: Add CFR option menu support

Add CFR option menu support when using edk2 payload and SMMSTORE.
Include relevant items from Cometlake SoC and Intel common.

TEST=build/boot google/drallion, verify CFR option functionality.

Change-Id: I9cff10b4782f6066e79cca8d39cb7cbc053d88ea
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90345
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/google/drallion/Kconfig

@@ -8,6 +8,7 @@ config BOARD_GOOGLE_BASEBOARD_DRALLION
 	select DRIVERS_I2C_GENERIC
 	select DRIVERS_I2C_HID
 	select DRIVERS_INTEL_ISH
+	select DRIVERS_OPTION_CFR_ENABLED if PAYLOAD_EDK2 && SMMSTORE
 	select DRIVERS_SPI_ACPI
 	select DRIVERS_USB_ACPI
 	select EC_GOOGLE_WILCO

src/mainboard/google/drallion/Makefile.mk

@@ -11,6 +11,7 @@ romstage-$(CONFIG_CHROMEOS) += chromeos.c
 romstage-y += ec.c
 romstage-y += romstage.c
 
+ramstage-$(CONFIG_DRIVERS_OPTION_CFR) += cfr.c
 ramstage-$(CONFIG_CHROMEOS) += chromeos.c
 ramstage-y += ec.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB) += hda_verb.c

src/mainboard/google/drallion/cfr.c

@@ -0,0 +1,36 @@
+
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <boot/coreboot_tables.h>
+#include <drivers/option/cfr_frontend.h>
+#include <intelblocks/cfr.h>
+#include <soc/cfr.h>
+
+static struct sm_obj_form system = {
+	.ui_name = "System",
+	.obj_list = (const struct sm_object *[]) {
+		&hyper_threading,
+		&igd_dvmt,
+		&igd_aperture,
+		&legacy_8254_timer,
+		&me_state,
+		&me_state_counter,
+		&pciexp_aspm,
+		&pciexp_clk_pm,
+		&pciexp_l1ss,
+		&pciexp_speed,
+		&s0ix_enable,
+		&vtd,
+		NULL
+	},
+};
+
+static struct sm_obj_form *sm_root[] = {
+	&system,
+	NULL
+};
+
+void mb_cfr_setup_menu(struct lb_cfr *cfr_root)
+{
+	cfr_write_setup_menu(cfr_root, sm_root);
+}