From 8a0115963aa7460e4c7255ab8508d7d52d67fb67 Mon Sep 17 00:00:00 2001 From: Vadim Bendebury Date: Tue, 4 Nov 2014 16:12:05 -0800 Subject: [PATCH] urara: Fix CBFS header definitions Urara CBFS header configuration is broken. CBFS header needs to be right above the bootblock, and the CBFS data - 0x100 bytes above, to allow room for proper CBFS wrapper structures. Ideally only the header offset should be specified (and even that could be derived from the bootblock size). But this is a more generic problem to be addressed with different architectures' image layout requirements in mind. BRANCH=none BUG=chrome-os-partner:31438 TEST=coreboot image passes the integrity check now (it was failing before because CBGS header was overlaying the bootblock) $ FEATURES=noclean emerge-urara coreboot $ /build/urara/tmp/portage/sys-boot/coreboot-9999/work/coreboot-9999/build/util/bimgtool/bimgtool \ /build/urara/firmware/coreboot.rom.serial $ cbfstool /build/urara/firmware/coreboot.rom.serial print coreboot.rom.serial: 1024 kB, bootblocksize 9956, romsize 1048576, offset 0x4100 alignment: 64 bytes, architecture: mips Name Offset Type Size fallback/romstage 0x4100 stage 7100 fallback/ramstage 0x5d00 stage 18995 config 0xa780 raw 2452 (empty) 0xb140 null 1003096 Change-Id: Id200ab5421661ef39b7c7713e931c39153fdc8be Signed-off-by: Vadim Bendebury Reviewed-on: https://chromium-review.googlesource.com/227523 Reviewed-by: Stefan Reinauer --- src/cpu/mips/Kconfig | 5 ----- src/soc/imgtec/pistachio/Kconfig | 4 ++++ 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/src/cpu/mips/Kconfig b/src/cpu/mips/Kconfig index 45079776fb..22ac379d16 100644 --- a/src/cpu/mips/Kconfig +++ b/src/cpu/mips/Kconfig @@ -29,8 +29,3 @@ config BOOTBLOCK_ROM_OFFSET hex depends on CPU_MIPS default 0x00 - -config CBFS_HEADER_ROM_OFFSET - hex - depends on CPU_MIPS - default 0x10 diff --git a/src/soc/imgtec/pistachio/Kconfig b/src/soc/imgtec/pistachio/Kconfig index c46635e77e..5a13580bca 100644 --- a/src/soc/imgtec/pistachio/Kconfig +++ b/src/soc/imgtec/pistachio/Kconfig @@ -37,6 +37,10 @@ config BOOTBLOCK_CPU_INIT default "soc/imgtec/pistachio/bootblock.c" config CBFS_ROM_OFFSET + hex + default 0x4100 + +config CBFS_HEADER_ROM_OFFSET # Effectively the maximum size of the bootblock hex default 0x4000