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UPSTREAM: soc/intel/quark/bootblock: Remove clear_smi_and_wake_events

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It is not used in this file.

BUG=None
BRANCH=None
TEST=None

Change-Id: I59bb41370b97b79073c0fd82b1dbcae9fd8a62d0
Original-Reported-by: GCC 6.1.0
Original-Signed-off-by: Jonathan Neuschfer <j.neuschaefer@gmx.net>
Original-Reviewed-on: https://review.coreboot.org/15552
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/360814
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Jonathan Neuschäfer 2016-07-06 22:08:46 +02:00 • committed by chrome-bot
commit 89c0526e58
1 changed files with 0 additions and 9 deletions
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9
src/soc/intel/quark/bootblock/bootblock.c
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@ -21,15 +21,6 @@
#include <soc/pci_devs.h>
#include <soc/reg_access.h>
static const struct reg_script clear_smi_and_wake_events[] = {
/* Clear any SMI or wake events */
REG_GPE0_READ(R_QNC_GPE0BLK_GPE0S),
REG_GPE0_READ(R_QNC_GPE0BLK_SMIS),
REG_GPE0_OR(R_QNC_GPE0BLK_GPE0S, B_QNC_GPE0BLK_GPE0S_ALL),
REG_GPE0_OR(R_QNC_GPE0BLK_SMIS, B_QNC_GPE0BLK_SMIS_ALL),
REG_SCRIPT_END
};
static const struct reg_script legacy_gpio_init[] = {
/* Temporarily enable the legacy GPIO controller */
REG_PCI_WRITE32(R_QNC_LPC_GBA_BASE, IO_ADDRESS_VALID