UPSTREAM: src/soc/intel: Don't allow user to select PCIe config mmio size

BUG=none
BRANCH=none
TEST=none

Change-Id: I6960f16a67860c0521be4eb621d028cfda7775ee
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 24c3fef31b
Original-Change-Id: I8b2794f56f39492589a08e5676cb33eec89a976e
Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Reviewed-on: https://review.coreboot.org/20179
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/539215
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
This commit is contained in:
Arthur Heymans 2017-06-13 14:13:40 +02:00 committed by chrome-bot
commit 88e3ffdf99

View file

@ -17,13 +17,13 @@ config SA_PCIEX_LENGTH
This option allows you to select length of PCIEX region.
config PCIEX_LENGTH_256MB
bool "256MB"
bool
config PCIEX_LENGTH_128MB
bool "128MB"
bool
config PCIEX_LENGTH_64MB
bool "64MB"
bool
config SA_ENABLE_IMR
bool