diff --git a/src/soc/intel/baytrail/dptf.c b/src/soc/intel/baytrail/dptf.c
index 691e220abc..184f694eb2 100644
--- a/src/soc/intel/baytrail/dptf.c
+++ b/src/soc/intel/baytrail/dptf.c
@@ -37,8 +37,8 @@ static const struct reg_script dptf_init_settings[] = {
 	REG_IOSF_WRITE(IOSF_PORT_PMC, PUNIT_TTE_XXPROCHOT, 0x00061029),
 	REG_IOSF_WRITE(IOSF_PORT_PMC, PUNIT_TTE_SLM0, 0x00001029),
 	REG_IOSF_WRITE(IOSF_PORT_PMC, PUNIT_TTE_SLM1, 0x00001029),
-	/* ratio 10 = 1333mhz for 2.5W fanless */
-	REG_IOSF_WRITE(IOSF_PORT_PMC, PUNIT_SOC_POWER_BUDGET, 0x00000A00),
+	/* ratio 11 = 1466mhz for mid and entry celeron */
+	REG_IOSF_WRITE(IOSF_PORT_PMC, PUNIT_SOC_POWER_BUDGET, 0x00000B00),
 	REG_IOSF_WRITE(IOSF_PORT_PMC, PUNIT_SOC_ENERGY_CREDIT, 0x00000002),
 	REG_SCRIPT_END,
 };
diff --git a/src/soc/intel/baytrail/gfx.c b/src/soc/intel/baytrail/gfx.c
index 7a8660ca48..3c779e11f4 100644
--- a/src/soc/intel/baytrail/gfx.c
+++ b/src/soc/intel/baytrail/gfx.c
@@ -142,7 +142,7 @@ static const struct reg_script gfx_init_script[] = {
 
 	/* Program PUNIT_GPU_EC_VIRUS based on DPTF SDP */
 	/* SDP Profile 4 == 0x11940, others 0xcf08 */
-	REG_IOSF_WRITE(IOSF_PORT_PMC, PUNIT_GPU_EC_VIRUS, 0x11940),
+	REG_IOSF_WRITE(IOSF_PORT_PMC, PUNIT_GPU_EC_VIRUS, 0xcf08),
 
 	/* GfxPause */
 	REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0xa000, 0x00071388),