From 87b02a64fa8397aa9c9d827b0b6d36d34ea7bee4 Mon Sep 17 00:00:00 2001 From: Shawn Nematbakhsh Date: Thu, 21 Aug 2014 14:14:04 -0700 Subject: [PATCH] auron: Move SPD handling to separate file The code to find the SPD data for the mainboard based on GPIOs is moved from romstage.c into spd.c. It relies on the updated pei_data structure from broadwell instead of the haswell interface. BUG=chrome-os-partner:31286 TEST=Compile only. BRANCH=None. Change-Id: Idd9de5701a710be7f59d8e1cd9af2ddea236c261 Signed-off-by: Shawn Nematbakhsh Reviewed-on: https://chromium-review.googlesource.com/213955 Reviewed-by: Duncan Laurie --- src/mainboard/google/auron/Makefile.inc | 1 + src/mainboard/google/auron/romstage.c | 36 +----------- src/mainboard/google/auron/spd.c | 78 +++++++++++++++++++++++++ src/mainboard/google/auron/spd.h | 33 +++++++++++ 4 files changed, 115 insertions(+), 33 deletions(-) create mode 100644 src/mainboard/google/auron/spd.c create mode 100644 src/mainboard/google/auron/spd.h diff --git a/src/mainboard/google/auron/Makefile.inc b/src/mainboard/google/auron/Makefile.inc index 77af0b96bd..aebaca0a0b 100644 --- a/src/mainboard/google/auron/Makefile.inc +++ b/src/mainboard/google/auron/Makefile.inc @@ -25,6 +25,7 @@ ramstage-$(CONFIG_CHROMEOS) += chromeos.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c ## DIMM SPD for on-board memory +romstage-y += spd.c SPD_BIN = $(obj)/spd.bin # Order of names in SPD_SOURCES is important! diff --git a/src/mainboard/google/auron/romstage.c b/src/mainboard/google/auron/romstage.c index 136f594ace..7d84a1372b 100644 --- a/src/mainboard/google/auron/romstage.c +++ b/src/mainboard/google/auron/romstage.c @@ -29,6 +29,7 @@ #include #include #include "gpio.h" +#include "spd.h" const struct rcba_config_instruction rcba_config[] = { @@ -70,38 +71,6 @@ const struct rcba_config_instruction rcba_config[] = { RCBA_END_CONFIG, }; -/* Copy SPD data for on-board memory */ -static void copy_spd(struct pei_data *peid) -{ - const int gpio_vector[] = {13, 9, 47, -1}; - int spd_index = get_gpios(gpio_vector); - struct cbfs_file *spd_file; - - printk(BIOS_DEBUG, "SPD index %d\n", spd_index); - spd_file = cbfs_get_file(CBFS_DEFAULT_MEDIA, "spd.bin"); - if (!spd_file) - die("SPD data not found."); - - /* Index 0-2 are 4GB config with both CH0 and CH1. - * Index 4-6 are 2GB config with CH0 only. */ - if (spd_index > 3) - peid->dimm_channel1_disabled = 3; - - if (ntohl(spd_file->len) < - ((spd_index + 1) * sizeof(peid->spd_data[0]))) { - printk(BIOS_ERR, "SPD index override to 0 - old hardware?\n"); - spd_index = 0; - } - - if (spd_file->len < sizeof(peid->spd_data[0])) - die("Missing SPD data."); - - memcpy(peid->spd_data[0], - ((char*)CBFS_SUBHEADER(spd_file)) + - spd_index * sizeof(peid->spd_data[0]), - sizeof(peid->spd_data[0])); -} - void mainboard_romstage_entry(unsigned long bist) { struct pei_data pei_data = { @@ -163,9 +132,10 @@ void mainboard_romstage_entry(unsigned long bist) .gpio_map = &mainboard_gpio_map, .rcba_config = &rcba_config[0], .bist = bist, - .copy_spd = copy_spd, }; + mainboard_fill_spd_data(&pei_data); + /* Call into the real romstage main with this board's attributes. */ romstage_common(&romstage_params); } diff --git a/src/mainboard/google/auron/spd.c b/src/mainboard/google/auron/spd.c new file mode 100644 index 0000000000..50aec77e3f --- /dev/null +++ b/src/mainboard/google/auron/spd.c @@ -0,0 +1,78 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include "gpio.h" +#include "spd.h" + +/* Copy SPD data for on-board memory */ +void mainboard_fill_spd_data(struct pei_data *pei_data) +{ + int spd_gpio[3]; + int spd_index; + int spd_file_len; + struct cbfs_file *spd_file; + + spd_gpio[0] = get_gpio(SPD_GPIO_BIT0); + spd_gpio[1] = get_gpio(SPD_GPIO_BIT1); + spd_gpio[2] = get_gpio(SPD_GPIO_BIT2); + + spd_index = spd_gpio[2] << 2 | spd_gpio[1] << 1 | spd_gpio[0]; + + printk(BIOS_DEBUG, "SPD: index %d (GPIO%d=%d GPIO%d=%d GPIO%d=%d)\n", + spd_index, + SPD_GPIO_BIT2, spd_gpio[2], + SPD_GPIO_BIT1, spd_gpio[1], + SPD_GPIO_BIT0, spd_gpio[0]); + + spd_file = cbfs_get_file(CBFS_DEFAULT_MEDIA, "spd.bin"); + if (!spd_file) + die("SPD data not found."); + spd_file_len = ntohl(spd_file->len); + + if (spd_index > 3) + pei_data->dimm_channel1_disabled = 3; + + if (spd_file_len < ((spd_index + 1) * SPD_LEN)) { + printk(BIOS_ERR, "SPD index override to 0 - old hardware?\n"); + spd_index = 0; + } + + if (spd_file_len < SPD_LEN) + die("Missing SPD data."); + + spd_index *= SPD_LEN; + + memcpy(pei_data->spd_data[0][0], + ((char*)CBFS_SUBHEADER(spd_file)) + spd_index, SPD_LEN); + /* Index 0-2 are 4GB config with both CH0 and CH1. + * Index 4-6 are 2GB config with CH0 only. */ + if (spd_index > 3) + pei_data->dimm_channel1_disabled = 3; + else + memcpy(pei_data->spd_data[1][0], + ((char*)CBFS_SUBHEADER(spd_file)) + spd_index, SPD_LEN); +} + diff --git a/src/mainboard/google/auron/spd.h b/src/mainboard/google/auron/spd.h new file mode 100644 index 0000000000..b26f1f4a62 --- /dev/null +++ b/src/mainboard/google/auron/spd.h @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef MAINBOARD_SPD_H +#define MAINBOARD_SPD_H + +#define SPD_LEN 256 + +/* Auron board memory configuration GPIOs */ +#define SPD_GPIO_BIT0 13 +#define SPD_GPIO_BIT1 9 +#define SPD_GPIO_BIT2 47 + +struct pei_data; +void mainboard_fill_spd_data(struct pei_data *pei_data); + +#endif