From 8795680828f108f2c8f6e650e55643ee88dc807e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Fri, 24 Oct 2025 13:22:24 +0200 Subject: [PATCH] cpu/x86/lapic/lapic.c: Set spurious interrupt vector to 0xF MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The MP Specification v1.4 says to program the spurious interrupt in the following way: "The APIC spurious interrupt must point to a vector whose lower nibble is 0F, that is 0xF, where x is 0 - F. Here we use Int 00FH, which handles spurious interrupts and supplies the necessary IRET. This vector is assumed to have already been initialized in memory." Follow the requirement and set the spurious interrupt vector to 0x0F. This is what reference implementations, like EDK2, and also BIOS vendors do. Change-Id: I7bde413bbadca1de0079daf52b5501ba6638a4c3 Signed-off-by: Michał Żygowski Reviewed-on: https://review.coreboot.org/c/coreboot/+/89736 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier --- src/cpu/x86/lapic/lapic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/cpu/x86/lapic/lapic.c b/src/cpu/x86/lapic/lapic.c index 6afd6c56ea..2d47d3e95f 100644 --- a/src/cpu/x86/lapic/lapic.c +++ b/src/cpu/x86/lapic/lapic.c @@ -76,9 +76,9 @@ void setup_lapic_interrupts(void) */ lapic_update32(LAPIC_TASKPRI, ~LAPIC_TPRI_MASK, 0); - /* Set spurious interrupt vector to 0 and keep LAPIC enabled to + /* Set spurious interrupt vector to 0xF and keep LAPIC enabled to be able to clear LVT register mask bits. */ - lapic_update32(LAPIC_SPIV, ~LAPIC_VECTOR_MASK, LAPIC_SPIV_ENABLE); + lapic_update32(LAPIC_SPIV, ~LAPIC_VECTOR_MASK, LAPIC_SPIV_ENABLE | 0xF); /* Put the local APIC in virtual wire mode */ uint32_t mask = LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | LAPIC_INPUT_POLARITY |