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tegra124: enable flow control for APBDMA in SPI driver

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This enables flow control and sets the REQ_SEL field according
to the SPI bus.

Since REQ_SEL is just a constant that is associated with each
channel, a member is added to the tegra_spi_regs struct to hold
the appropriate value.

BUG=none
BRANCH=none
TEST=built and booted on Nyan
Signed-off-by: David Hendricks <dhendrix@chromium.org>

Change-Id: I037aee7e2d422e24a4cbcbc75280ec3c93d3e7bd
Reviewed-on: https://chromium-review.googlesource.com/175630
Reviewed-by: Julius Werner <jwerner@chromium.org>
Commit-Queue: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
This commit is contained in:
David Hendricks 2013-11-04 14:41:32 -08:00 • committed by chrome-internal-fetch
commit 873e6f9e95
2 changed files with 17 additions and 4 deletions
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15
src/soc/nvidia/tegra124/spi.c
View file

@ -129,26 +129,32 @@ static struct tegra_spi_channel tegra_spi_channels[] = {
{
.slave = { .bus = 1, },
.regs = (struct tegra_spi_regs *)TEGRA_SPI1_BASE,
.req_sel = APBDMA_SLAVE_SL2B1,
},
{
.slave = { .bus = 2, },
.regs = (struct tegra_spi_regs *)TEGRA_SPI2_BASE,
.req_sel = APBDMA_SLAVE_SL2B2,
},
{
.slave = { .bus = 3, },
.regs = (struct tegra_spi_regs *)TEGRA_SPI3_BASE,
.req_sel = APBDMA_SLAVE_SL2B3,
},
{
.slave = { .bus = 4, },
.regs = (struct tegra_spi_regs *)TEGRA_SPI4_BASE,
.req_sel = APBDMA_SLAVE_SL2B4,
},
{
.slave = { .bus = 5, },
.regs = (struct tegra_spi_regs *)TEGRA_SPI5_BASE,
.req_sel = APBDMA_SLAVE_SL2B5,
},
{
.slave = { .bus = 6, },
.regs = (struct tegra_spi_regs *)TEGRA_SPI6_BASE,
.req_sel = APBDMA_SLAVE_SL2B6,
},
};
@ -416,8 +422,13 @@ static void setup_dma_params(struct tegra_spi_channel *spi,
(AHB_BURST_MASK << AHB_BURST_SHIFT) |
(AHB_SEQ_WRAP_MASK << AHB_SEQ_WRAP_SHIFT),
AHB_BURST_MASK << AHB_BURST_SHIFT);
/* Set ONCE mode to transfer one "blocK" at a time (64KB). */
setbits_le32(&dma->regs->csr, APB_CSR_ONCE);
/* Set ONCE mode to transfer one "block" at a time (64KB) and enable
* flow control. */
clrbits_le32(&dma->regs->csr,
APB_CSR_REQ_SEL_MASK << APB_CSR_REQ_SEL_SHIFT);
setbits_le32(&dma->regs->csr, APB_CSR_ONCE | APB_CSR_FLOW |
(spi->req_sel << APB_CSR_REQ_SEL_SHIFT));
}
static int tegra_spi_dma_prepare(struct tegra_spi_channel *spi,

6
src/soc/nvidia/tegra124/spi.h
View file

@ -47,9 +47,12 @@ enum spi_xfer_mode {
};
struct tegra_spi_channel {
struct spi_slave slave;
struct tegra_spi_regs *regs;
/* static configuration */
struct spi_slave slave;
unsigned int req_sel;
/* stuff that is specific to the attached device */
int rx_frame_header_enable;
u8 frame_header;
@ -58,7 +61,6 @@ struct tegra_spi_channel {
u8 *in_buf, *out_buf;
struct apb_dma_channel *dma_out, *dma_in;
enum spi_xfer_mode xfer_mode;
};
struct cbfs_media;