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smi: Update mainboard_smi_gpi() to have 32bit argument

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With the LynxPoint chipset there are more than 16
possible GPIOs that can trigger an SMI so we need
a mainboard handler that can support this.

There are only a handful of users of this function
so just change them all to use the new prototype.

BUG=chrome-os-partner:16862
BRANCH=none
TEST=manual: build and boot on wtm2

Change-Id: I3d96da0397d6584f713fcf6003054b25c1c92939
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49530
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Duncan Laurie 2013-04-29 15:04:30 -07:00 • committed by ChromeBot
commit 86bd4f640e
11 changed files with 12 additions and 12 deletions
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2
src/cpu/x86/smm/smm_module_handler.c
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@ -165,6 +165,6 @@ int __attribute__((weak)) mainboard_io_trap_handler(int smif) { return 0; }
void __attribute__((weak)) cpu_smi_handler(void) {}
void __attribute__((weak)) northbridge_smi_handler() {}
void __attribute__((weak)) southbridge_smi_handler() {}
void __attribute__((weak)) mainboard_smi_gpi(u16 gpi_sts) {}
void __attribute__((weak)) mainboard_smi_gpi(u32 gpi_sts) {}
int __attribute__((weak)) mainboard_smi_apmc(u8 data) { return 0; }
void __attribute__((weak)) mainboard_smi_sleep(u8 slp_typ) {}