diff --git a/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/Makefile.mk b/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/Makefile.mk
index 03a936c199..2aa4fa9f80 100644
--- a/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/Makefile.mk
+++ b/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/Makefile.mk
@@ -3,5 +3,6 @@
 bootblock-y += early_gpio.c
 ramstage-y += gpio.c
 romstage-y += variant.c
+ramstage-y += ramstage.c
 
 all-$(CONFIG_NC_FPGA_POST_CODE) += post.c
diff --git a/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/ramstage.c b/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/ramstage.c
new file mode 100644
index 0000000000..b49ab1d0f9
--- /dev/null
+++ b/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/ramstage.c
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <bootstate.h>
+#include <gpio.h>
+
+static void finalize_boot(void *unused)
+{
+	/* Set coreboot ready LED. */
+	gpio_output(GPP_F4, 1);
+}
+
+BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, finalize_boot, NULL);