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mb/google/rauru: Enable ChromeOS EC

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1. Configure ChromeOS EC
2. Pass GPIO_EC_AP_INT_ODL to the payload

TEST=build pass
BUG=b:317009620

Change-Id: I20828eee93975e75dfb777fe29d5e1c3454b5059
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84931
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
This commit is contained in:
Yidi Lin 2024-04-09 21:27:11 +08:00 • committed by Yu-Ping Wu
commit 84527cbb96
5 changed files with 19 additions and 2 deletions
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10
src/mainboard/google/rauru/Kconfig
View file

@ -10,7 +10,7 @@ if BOARD_GOOGLE_RAURU_COMMON
config VBOOT
select VBOOT_VBNV_FLASH
select VBOOT_NO_BOARD_SUPPORT
select EC_GOOGLE_CHROMEEC_SWITCHES
select VBOOT_MOCK_SECDATA
config BOARD_SPECIFIC_OPTIONS
@ -21,6 +21,10 @@ config BOARD_SPECIFIC_OPTIONS
select COMMON_CBFS_SPI_WRAPPER
select SPI_FLASH
select SPI_FLASH_INCLUDE_ALL_DRIVERS
select CHROMEOS_USE_EC_WATCHDOG_FLAG if CHROMEOS
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_BOARDID
select EC_GOOGLE_CHROMEEC_SPI
config MAINBOARD_DIR
string
@ -35,4 +39,8 @@ config MAINBOARD_PART_NUMBER
config BOOT_DEVICE_SPI_FLASH_BUS
int
default 8
config EC_GOOGLE_CHROMEEC_SPI_BUS
hex
default 0x1
endif

1
src/mainboard/google/rauru/bootblock.c
View file

@ -17,6 +17,7 @@ void bootblock_mainboard_init(void)
if (CONFIG(PCI))
mtk_pcie_pre_init();
mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 3 * MHz, 0);
mtk_snfc_init();
usb3_hub_reset();
setup_chromeos_gpios();

3
src/mainboard/google/rauru/chromeos.c
View file

@ -7,6 +7,8 @@
void setup_chromeos_gpios(void)
{
gpio_input(GPIO_EC_AP_INT_ODL);
gpio_output(GPIO_AP_EC_WARM_RST_REQ, 0);
gpio_output(GPIO_AP_FP_FW_UP_STRAP, 0);
gpio_output(GPIO_BEEP_ON_OD, 0);
gpio_output(GPIO_EN_PWR_FP, 0);
@ -20,6 +22,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
struct lb_gpio chromeos_gpios[] = {
{ GPIO_XHCI_INIT_DONE.id, ACTIVE_HIGH, -1, "XHCI init done" },
{ GPIO_EN_SPKR.id, ACTIVE_HIGH, -1, "speaker enable" },
{ GPIO_EC_AP_INT_ODL.id, ACTIVE_LOW, -1, "EC interrupt" },
{ GPIO_BEEP_ON_OD.id, ACTIVE_HIGH, -1, "beep enable" },
};
lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));

2
src/mainboard/google/rauru/gpio.h
View file

@ -7,7 +7,9 @@
#define GPIO_BEEP_ON_OD GPIO(PERIPHERAL_EN1)
#define GPIO_EN_SPKR GPIO(PERIPHERAL_EN0)
#define GPIO_EC_AP_INT_ODL GPIO(EINT19)
#define GPIO_XHCI_INIT_DONE GPIO(EINT28)
#define GPIO_AP_EC_WARM_RST_REQ GPIO(EINT29)
#define GPIO_FP_RST_1V8_S3_L GPIO(EINT26)
#define GPIO_AP_FP_FW_UP_STRAP GPIO(EINT27)
#define GPIO_EN_PWR_FP GPIO(PERIPHERAL_EN3)

5
src/mainboard/google/rauru/reset.c
View file

@ -1,8 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <gpio.h>
#include <reset.h>
#include "gpio.h"
void do_board_reset(void)
{
/* TODO: add reset function when gpio is ready */
gpio_output(GPIO_AP_EC_WARM_RST_REQ, 1);
}