ARM: Generalize armv7 as arm.

There are ARM systems which are essentially heterogeneous multicores where
some cores implement a different ARM architecture version than other cores. A
specific example is the tegra124 which boots on an ARMv4 coprocessor while
most code, including most of the firmware, runs on the main ARMv7 core. To
support SOCs like this, the plan is to generalize the ARM architecture so that
all versions are available, and an SOC/CPU can then select what architecture
variant should be used for each component of the firmware; bootblock,
romstage, and ramstage.

BUG=chrome-os-partner:23009
TEST=Built libpayload and coreboot for link, pit and nyan. Booted into the
bootblock on nyan.
BRANCH=None

Change-Id: I22e048c3bc72bd56371e14200942e436c1e312c2
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/171338
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>

src/arch/arm/Kconfig

@@ -1,4 +1,4 @@
-menu "Architecture (armv7)"
+menu "Architecture (arm)"
 
 
 config ARM_ARCH_OPTIONS

src/arch/arm/Makefile.inc

@@ -38,7 +38,7 @@ ifneq ($(CONFIG_ARM_BOOTBLOCK_CUSTOM),y)
 bootblock-y += bootblock.S
 endif
 bootblock-y += id.S
-$(obj)/arch/armv7/id.bootblock.o: $(obj)/build.h
+$(obj)/arch/arm/id.bootblock.o: $(obj)/build.h
 bootblock-$(CONFIG_ARM_BOOTBLOCK_SIMPLE) += bootblock_simple.c
 bootblock-$(CONFIG_ARM_BOOTBLOCK_NORMAL) += bootblock_normal.c
 
@@ -79,7 +79,7 @@ rmodules-y += memcpy.S
 rmodules-y += memmove.S
 rmodules-y += eabi_compat.c
 
-VBOOT_STUB_DEPS += $(obj)/arch/armv7/eabi_compat.rmodules.o
+VBOOT_STUB_DEPS += $(obj)/arch/arm/eabi_compat.rmodules.o
 
 romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
 ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
@@ -87,7 +87,7 @@ ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mainboard.c
 
 ################################################################################
-# armv7 specific tools
+# arm specific tools
 
 ################################################################################
 # Common recipes for all stages
@@ -134,7 +134,7 @@ prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file)))
 
 # TODO Change -b to Kconfig variable.
 $(obj)/coreboot.pre1: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file)
-	$(CBFSTOOL) $@.tmp create -m armv7 -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \
+	$(CBFSTOOL) $@.tmp create -m arm -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \
 		-B $(objcbfs)/bootblock.bin -a 64 \
 		-b $(CONFIG_BOOTBLOCK_ROM_OFFSET) \
 		-H $(CONFIG_CBFS_HEADER_ROM_OFFSET) \
@@ -173,34 +173,34 @@ endif
 ################################################################################
 # Build the bootblock
 
-$(objcbfs)/bootblock.debug: $(src)/arch/armv7/bootblock.ld $(obj)/ldoptions $$(bootblock-objs) $(obj)/config.h
+$(objcbfs)/bootblock.debug: $(src)/arch/arm/bootblock.ld $(obj)/ldoptions $$(bootblock-objs) $(obj)/config.h
 	@printf "    LINK       $(subst $(obj)/,,$(@))\n"
 ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
-	$(LD) -m armelf_linux_eabi -static -o $@ -L$(obj) $< -T $(src)/arch/armv7/bootblock.ld
+	$(LD) -m armelf_linux_eabi -static -o $@ -L$(obj) $< -T $(src)/arch/arm/bootblock.ld
 else
-	$(CC) $(CFLAGS) -nostartfiles -include $(obj)/config.h -static -o $@ -L$(obj) -T $(src)/arch/armv7/bootblock.ld -Wl,--start-group $(bootblock-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
+	$(CC) $(CFLAGS) -nostartfiles -include $(obj)/config.h -static -o $@ -L$(obj) -T $(src)/arch/arm/bootblock.ld -Wl,--start-group $(bootblock-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
 endif
 
 ################################################################################
 # Build the romstage
 
-$(objcbfs)/romstage.debug: $$(romstage-objs) $(src)/arch/armv7/romstage.ld $(obj)/ldoptions
+$(objcbfs)/romstage.debug: $$(romstage-objs) $(src)/arch/arm/romstage.ld $(obj)/ldoptions
 	@printf "    LINK       $(subst $(obj)/,,$(@))\n"
 ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
-	$(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(src)/arch/armv7/romstage.ld
+	$(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(src)/arch/arm/romstage.ld
 else
-	$(CC) $(CFLAGS) -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/romstage.ld -Wl,--start-group $(romstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
+	$(CC) $(CFLAGS) -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/arm/romstage.ld -Wl,--start-group $(romstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
 endif
 
 ################################################################################
 # Build the ramstage
 
-$(objcbfs)/coreboot_ram.debug: $$(ramstage-objs) $(LIBGCC_FILE_NAME) $(src)/arch/armv7/coreboot_ram.ld $(obj)/ldoptions
+$(objcbfs)/coreboot_ram.debug: $$(ramstage-objs) $(LIBGCC_FILE_NAME) $(src)/arch/arm/coreboot_ram.ld $(obj)/ldoptions
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
 ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
-	$(LD) -m -m armelf_linux_eabi -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group -T $(src)/arch/armv7/coreboot_ram.ld
+	$(LD) -m -m armelf_linux_eabi -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group -T $(src)/arch/arm/coreboot_ram.ld
 else
-	$(CC) $(CFLAGS) -nostartfiles -static -o $@ -L$(obj) -Wl,--start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group -T $(src)/arch/armv7/coreboot_ram.ld
+	$(CC) $(CFLAGS) -nostartfiles -static -o $@ -L$(obj) -Wl,--start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group -T $(src)/arch/arm/coreboot_ram.ld
 endif
 
 ################################################################################

src/arch/arm/bootblock.S

@@ -1,5 +1,5 @@
 /*
- * Early initialization code for ARMv7 architecture.
+ * Early initialization code for ARM architecture.
  *
  * This file is based off of the OMAP3530/ARM Cortex start.S file from Das
  * U-Boot, which itself got the file from armboot.

src/arch/arm/bootblock_simple.c

@@ -38,7 +38,7 @@ void main(void)
 	sctlr &= ~(SCTLR_M | SCTLR_C | SCTLR_Z | SCTLR_I);
 	write_sctlr(sctlr);
 
-	armv7_invalidate_caches();
+	arm_invalidate_caches();
 
 	/*
 	 * Re-enable icache and branch prediction. MMU and dcache will be

src/arch/arm/cache.c

@@ -276,7 +276,7 @@ void dcache_mmu_enable(void)
 	write_sctlr(sctlr);
 }
 
-void armv7_invalidate_caches(void)
+void arm_invalidate_caches(void)
 {
 	uint32_t clidr;
 	int level;

src/arch/arm/coreboot_ram.ld

@@ -33,7 +33,7 @@ SECTIONS
 	.text : {
 		_text = .;
 		_start = .;
-		*(.text.stage_entry.armv7);
+		*(.text.stage_entry.arm);
 		*(.text);
 		*(.text.*);
 		. = ALIGN(16);

src/arch/arm/include/arch/cache.h

@@ -26,11 +26,11 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- * cache.h: Cache maintenance API for ARMv7
+ * cache.h: Cache maintenance API for ARM
  */
 
-#ifndef ARMV7_CACHE_H
-#define ARMV7_CACHE_H
+#ifndef ARM_CACHE_H
+#define ARM_CACHE_H
 
 #include <config.h>
 #include <stddef.h>
@@ -327,8 +327,8 @@ void tlb_invalidate_all(void);
  * Generalized setup/init functions
  */
 
-/* invalidate all caches on ARMv7 */
-void armv7_invalidate_caches(void);
+/* invalidate all caches on ARM */
+void arm_invalidate_caches(void);
 
 /* mmu initialization (set page table address, set permissions, etc) */
 void mmu_init(void);
@@ -345,4 +345,4 @@ void mmu_disable_range(unsigned long start_mb, unsigned long size_mb);
 void mmu_config_range(unsigned long start_mb, unsigned long size_mb,
 						enum dcache_policy policy);
 
-#endif /* ARMV7_CACHE_H */
+#endif /* ARM_CACHE_H */

src/arch/arm/include/arch/pci_ops.h

@@ -17,8 +17,8 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#ifndef ARCH_ARMV7_PCI_OPS_H
-#define ARCH_ARMV7_PCI_OPS_H
+#ifndef ARCH_ARM_PCI_OPS_H
+#define ARCH_ARM_PCI_OPS_H
 
 static inline const struct pci_bus_operations *pci_config_default(void)
 {

src/arch/arm/include/arch/stages.h

@@ -22,7 +22,7 @@
 
 extern void main(void);
 
-void stage_entry(void) __attribute__((section(".text.stage_entry.armv7")));
+void stage_entry(void) __attribute__((section(".text.stage_entry.arm")));
 void stage_exit(void *);
 void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size);
 

src/arch/arm/romstage.ld

@@ -39,7 +39,7 @@ SECTIONS
 	.romtext . : {
 		_rom = .;
 		_start = .;
-		*(.text.stage_entry.armv7);
+		*(.text.stage_entry.arm);
 		*(.text.startup);
 		*(.text);
 	}