soc/intel/pantherlake: Rename GSPI2 to GSPI0A

Rename GSPI2 to GSPI0A to align with the latest Intel documentation
and platform specifications (doc: 815002)

BUG=b:377595986
TEST=Able to see 0x12.6 device is visible using `lspci`.

Change-Id: I9b87d38e44c07a053104b53df38ee1ce14a86c7f
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85685
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Pranava Y N <pranavayn@google.com>
Reviewed-by: YH Lin <yueherngl@google.com>

src/soc/intel/pantherlake/chipset.cb

@@ -90,7 +90,7 @@ chip soc/intel/pantherlake
 		device pci 10.1 alias thc1 off end
 		device pci 12.0 alias ish off end
 		device pci 12.1 alias p2sb2 hidden end
-		device pci 12.6 alias gspi2 off end
+		device pci 12.6 alias gspi0a off end
 		device pci 13.0 alias heci_1 off end
 		device pci 13.1 alias heci_2 off end
 		device pci 13.2 alias heci_3 off end

src/soc/intel/pantherlake/include/soc/serialio.h

@@ -23,7 +23,7 @@ enum {
 enum {
 	PchSerialIoIndexGSPI0,
 	PchSerialIoIndexGSPI1,
-	PchSerialIoIndexGSPI2,
+	PchSerialIoIndexGSPI0A,
 };
 
 enum {