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soc/mediatek/common: Convert spmi_dev_cnt to a function

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In some SoCs, such as MT8189G/H, different numbers of PMICs are
required. To ensure code reusability and compatibility, it is
necessary to dynamically set this variable. Therefore, spmi_dev_cnt
is changed to a function.

BUG=b:379008996
BRANCH=none
TEST=build passed

Signed-off-by: Vince Liu <vince-wl.liu@mediatek.corp-partner.google.com>
Change-Id: Ib8d6306a81c276dceb021ddadec40803fd85019b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87853
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
This commit is contained in:
Vince Liu 2025-04-10 13:15:29 +08:00 • committed by Yidi Lin
commit 80149f55f7
9 changed files with 34 additions and 18 deletions
Download patch file Download diff file Expand all files Collapse all files

2
src/soc/mediatek/common/include/soc/pmif_spmi.h
View file

@ -90,10 +90,10 @@ enum {
#define MT6315_DEFAULT_VALUE_READ 0x15
extern const struct spmi_device spmi_dev[];
extern const size_t spmi_dev_cnt;
int pmif_spmi_init(struct pmif *arb);
int spmi_config_master(void);
size_t spmi_dev_cnt(void);
void pmif_spmi_iocfg(void);
void pmif_spmi_config(struct pmif *arb);
#endif /* __SOC_MEDIATEK_PMIF_SPMI_H__ */

2
src/soc/mediatek/common/mt6315.c
View file

@ -101,7 +101,7 @@ void mt6315_init(void)
init_pmif_arb();
for (i = 0; i < spmi_dev_cnt; i++)
for (i = 0; i < spmi_dev_cnt(); i++)
mt6315_wdt_enable(spmi_dev[i].slvid);
mt6315_init_setting();

2
src/soc/mediatek/common/pmif_spmi.c
View file

@ -63,7 +63,7 @@ static int spmi_cali_rd_clock_polarity(struct pmif *pmif_arb)
bool success = true;
SET32_BITFIELDS(&mtk_spmi_mst->mst_sampl, SAMPL_CK_DLY,
cali_data[i].dly, SAMPL_CK_POL, cali_data[i].pol);
for (j = 0; j < spmi_dev_cnt; j++) {
for (j = 0; j < spmi_dev_cnt(); j++) {
if (spmi_read_check(pmif_arb, spmi_dev[j].slvid) != 0) {
success = false;
break;

7
src/soc/mediatek/mt8186/pmif_spmi.c
View file

@ -37,8 +37,6 @@ const struct spmi_device spmi_dev[] = {
},
};
const size_t spmi_dev_cnt = ARRAY_SIZE(spmi_dev);
int spmi_config_master(void)
{
/* Software reset */
@ -59,3 +57,8 @@ int spmi_config_master(void)
return 0;
}
size_t spmi_dev_cnt(void)
{
return ARRAY_SIZE(spmi_dev);
}

7
src/soc/mediatek/mt8188/pmif_spmi.c
View file

@ -38,8 +38,6 @@ const struct spmi_device spmi_dev[] = {
},
};
const size_t spmi_dev_cnt = ARRAY_SIZE(spmi_dev);
int spmi_config_master(void)
{
/* Software reset */
@ -97,3 +95,8 @@ void pmif_spmi_iocfg(void)
SET32_BITFIELDS(&mtk_iocfg_lt->drv_cfg3_clr, SPMI_DRI, 0x07);
SET32_BITFIELDS(&mtk_iocfg_lt->drv_cfg3_set, SPMI_DRI, 0x02);
}
size_t spmi_dev_cnt(void)
{
return ARRAY_SIZE(spmi_dev);
}

9
src/soc/mediatek/mt8189/pmif_spmi.c
View file

@ -1,7 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
#include <console/console.h>
#include <delay.h>
#include <device/mmio.h>
#include <gpio.h>
#include <soc/pll.h>
@ -20,8 +18,6 @@ const struct spmi_device spmi_dev[] = {
},
};
const size_t spmi_dev_cnt = ARRAY_SIZE(spmi_dev);
int spmi_config_master(void)
{
/* Enable SPMI */
@ -44,3 +40,8 @@ void pmif_spmi_iocfg(void)
gpio_set_driving(GPIO(SPMI_P_SCL), GPIO_DRV_10_MA);
gpio_set_driving(GPIO(SPMI_P_SDA), GPIO_DRV_10_MA);
}
size_t spmi_dev_cnt(void)
{
return ARRAY_SIZE(spmi_dev);
}

7
src/soc/mediatek/mt8192/pmif_spmi.c
View file

@ -34,8 +34,6 @@ const struct spmi_device spmi_dev[] = {
},
};
const size_t spmi_dev_cnt = ARRAY_SIZE(spmi_dev);
int spmi_config_master(void)
{
/* Software reset */
@ -81,3 +79,8 @@ void pmif_spmi_iocfg(void)
{
SET32_BITFIELDS(&mtk_iocfg_bm->drv_cfg2, SPMI_SCL, 0x2, SPMI_SDA, 0x2);
}
size_t spmi_dev_cnt(void)
{
return ARRAY_SIZE(spmi_dev);
}

7
src/soc/mediatek/mt8195/pmif_spmi.c
View file

@ -43,8 +43,6 @@ const struct spmi_device spmi_dev[] = {
},
};
const size_t spmi_dev_cnt = ARRAY_SIZE(spmi_dev);
int spmi_config_master(void)
{
/* Software reset */
@ -103,3 +101,8 @@ void pmif_spmi_iocfg(void)
SET32_BITFIELDS(&mtk_iocfg_bm->drv_cfg3_clr, SPMI_DRI, 0x2D);
SET32_BITFIELDS(&mtk_iocfg_bm->drv_cfg3_set, SPMI_DRI, 0x12);
}
size_t spmi_dev_cnt(void)
{
return ARRAY_SIZE(spmi_dev);
}

9
src/soc/mediatek/mt8196/pmif_spmi.c
View file

@ -114,8 +114,6 @@ static const uint32_t lat_limit[2][23] = {
0x1e, 0x0, 0x3e6 },
};
const size_t spmi_dev_cnt = ARRAY_SIZE(spmi_dev);
static struct mtk_spmi_mst_reg *get_mst_reg(struct pmif *arb)
{
if (arb->mstid == SPMI_MASTER_1)
@ -256,7 +254,7 @@ static int spmi_mst_init(struct pmif *arb)
if (pmif_spmi_config_master(arb))
return -1;
for (i = 0; i < spmi_dev_cnt; i++) {
for (i = 0; i < spmi_dev_cnt(); i++) {
if ((arb->mstid % 2) == spmi_dev[i].mstid) {
spmi_cali_rd_clock_polarity(arb, &spmi_dev[i]); /* spmi_cali */
spmi_config_slave(arb, &spmi_dev[i]);
@ -351,3 +349,8 @@ int pmif_spmi_init(struct pmif *arb)
return 0;
}
size_t spmi_dev_cnt(void)
{
return ARRAY_SIZE(spmi_dev);
}