From 7fd815dffed936838da8f044d4142dd3c756b296 Mon Sep 17 00:00:00 2001
From: Ana Carolina Cabral <ana.cpmelo95@gmail.com>
Date: Mon, 31 Mar 2025 13:56:40 -0300
Subject: [PATCH] soc/amd/cezanne: Add DPTC support

Add support for DPTC by calling SB.DPTC() as part of PNOT().

Change-Id: I29d7177c96217bf03eaea818cfc1f944f4e640a6
Signed-off-by: Ana Carolina Cabral <ana.cpmelo95@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87218
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/amd/cezanne/acpi/soc.asl | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/soc/amd/cezanne/acpi/soc.asl b/src/soc/amd/cezanne/acpi/soc.asl
index 4ab03d0f36..f89aaf4f1f 100644
--- a/src/soc/amd/cezanne/acpi/soc.asl
+++ b/src/soc/amd/cezanne/acpi/soc.asl
@@ -36,6 +36,9 @@ Scope(\_SB) {
 #include <soc/amd/common/acpi/dptc.asl>
 #endif
 
+/* Enable DPTC interface with AMD ALIB */
+External(\_SB.DPTC, MethodObj)
+
 #include "rtc_workaround.asl"
 
 /*
@@ -47,4 +50,8 @@ Method (PNOT)
 {
 	/* Report AC/DC state to ALIB using WAL1() */
 	\WAL1 ()
+
+	If (CondRefOf (\_SB.DPTC)) {
+		\_SB.DPTC()
+	}
 }