soc/mediatek/common: Refactor mtk_ddp_mode_set to support dual DSI and DSC for MIPI

Add the dsc_config parameter to mtk_ddp_soc_mode_set to support DSC
configuration, and updated function calls to pass dsc_config from
panel_serializable_data. The MIPI_DSI_DUAL_CHANNEL flag is set when the
panel uses the dual MIPI path. This patch is prepared for upcoming MIPI
DSI and DSC changes.

BUG=b:424782827
TEST=Build pass.

Change-Id: Ia3ada4aca41a231adb2273c34deef636889c5c81
Signed-off-by: Jarried Lin <jarried.lin@mediatek.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90377
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>

src/soc/mediatek/common/display.c

@@ -99,6 +99,7 @@ int mtk_display_init(void)
 {
 	struct edid edid = {0};
 	struct mtk_dp mtk_edp = {0};
+	struct dsc_config *dsc_config_var = NULL;
 	struct fb_info *info;
 	const char *name;
 	struct panel_description *panel = get_active_panel();
@@ -125,6 +126,7 @@ int mtk_display_init(void)
 	process_panel_quirks(&mtk_edp, panel);
 
 	if (panel->disp_path == DISP_PATH_EDP) {
+		/* Currently eDP does not support DSC */
 		if (mtk_edp_init(&mtk_edp, &edid) < 0) {
 			printk(BIOS_ERR, "%s: Failed to initialize eDP\n", __func__);
 			return -1;
@@ -142,11 +144,23 @@ int mtk_display_init(void)
 			edid = mipi_data->edid;
 		}
 
+		dsc_config_var = &mipi_data->dsc_config;
 		u32 mipi_dsi_flags = (MIPI_DSI_MODE_VIDEO |
 				      MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
 				      MIPI_DSI_MODE_LPM |
 				      MIPI_DSI_MODE_EOT_PACKET);
 
+		if (panel->disp_path == DISP_PATH_DUAL_MIPI) {
+			mipi_dsi_flags |= MIPI_DSI_DUAL_CHANNEL;
+			printk(BIOS_INFO, "%s: DSI dual mode\n", __func__);
+		}
+
+		if (dsc_config_var->dsc_version_major) {
+			mipi_dsi_flags |= MIPI_DSI_DSC_MODE;
+			printk(BIOS_INFO, "%s: DSC main version: %d\n", __func__,
+			       dsc_config_var->dsc_version_major);
+		}
+
 		if (mipi_data->flags & PANEL_FLAG_CPHY) {
 			mipi_dsi_flags |= MIPI_DSI_MODE_CPHY;
 			lanes = 3;
@@ -175,7 +189,7 @@ int mtk_display_init(void)
 
 	edid_set_framebuffer_bits_per_pixel(&edid, 32, 0);
 
-	mtk_ddp_mode_set(&edid, panel->disp_path);
+	mtk_ddp_mode_set(&edid, panel->disp_path, dsc_config_var);
 
 	if (panel->disp_path == DISP_PATH_EDP) {
 		if (mtk_edp_enable(&mtk_edp) < 0) {
@@ -200,7 +214,8 @@ int mtk_display_init(void)
 	return 0;
 }
 
-void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path)
+void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path,
+		      struct dsc_config *dsc_config)
 {
 	u32 fmt = OVL_INFMT_RGBA8888;
 	u32 bpp = edid->framebuffer_bits_per_pixel / 8;
@@ -222,5 +237,5 @@ void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path)
 		       vrefresh);
 	}
 
-	mtk_ddp_soc_mode_set(fmt, bpp, width, height, vrefresh, path);
+	mtk_ddp_soc_mode_set(fmt, bpp, width, height, vrefresh, path, dsc_config);
 }

src/soc/mediatek/common/include/soc/display.h

@@ -33,9 +33,10 @@ void mtk_display_disable_secure_mode(void);
 int mtk_display_init(void);
 
 void mtk_ddp_init(void);
-void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path);
 void mtk_ddp_soc_mode_set(u32 fmt, u32 bpp, u32 width, u32 height, u32 vrefresh,
-			  enum disp_path_sel path);
+			  enum disp_path_sel path, struct dsc_config *dsc_config);
+void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path,
+		      struct dsc_config *dsc_config);
 void mtk_ddp_ovlsys_start(uintptr_t fb_addr);
 
 #endif

src/soc/mediatek/common/include/soc/dsi_common.h

@@ -45,6 +45,10 @@ enum {
 	MIPI_DSI_MODE_LINE_END = BIT(12),
 	/* mipi is in CPHY mode */
 	MIPI_DSI_MODE_CPHY = BIT(13),
+	/* mipi is DSI Dual Channel mode */
+	MIPI_DSI_DUAL_CHANNEL = BIT(14),
+	/* mipi is DSC compression mode */
+	MIPI_DSI_DSC_MODE = BIT(15),
 };
 
 static struct dsi_regs *const dsi0 = (void *)DSI0_BASE;

src/soc/mediatek/mt8186/ddp.c

@@ -9,6 +9,7 @@
 #include <edid.h>
 #include <soc/addressmap.h>
 #include <soc/ddp.h>
+#include <soc/display.h>
 
 static void disp_config_main_path_connection(void)
 {
@@ -142,7 +143,7 @@ void mtk_ddp_init(void)
 }
 
 void mtk_ddp_soc_mode_set(u32 fmt, u32 bpp, u32 width, u32 height, u32 vrefresh,
-			  enum disp_path_sel path)
+			  enum disp_path_sel path, struct dsc_config *dsc_config)
 {
 	main_disp_path_setup(width, height, vrefresh);
 	rdma_start();

src/soc/mediatek/mt8188/ddp.c

@@ -5,6 +5,7 @@
 #include <edid.h>
 #include <soc/addressmap.h>
 #include <soc/ddp.h>
+#include <soc/display.h>
 
 static void disp_config_main_path_connection(enum disp_path_sel path)
 {
@@ -146,7 +147,7 @@ void mtk_ddp_init(void)
 }
 
 void mtk_ddp_soc_mode_set(u32 fmt, u32 bpp, u32 width, u32 height, u32 vrefresh,
-			  enum disp_path_sel path)
+			  enum disp_path_sel path, struct dsc_config *dsc_config)
 {
 	main_disp_path_setup(width, height, vrefresh, path);
 	rdma_start();

src/soc/mediatek/mt8189/ddp.c

@@ -4,6 +4,7 @@
 #include <edid.h>
 #include <soc/addressmap.h>
 #include <soc/ddp.h>
+#include <soc/display.h>
 #include <device/mmio.h>
 
 static void disp_config_main_path_connection(enum disp_path_sel path)
@@ -138,7 +139,7 @@ void mtk_ddp_init(void)
 }
 
 void mtk_ddp_soc_mode_set(u32 fmt, u32 bpp, u32 width, u32 height, u32 vrefresh,
-			  enum disp_path_sel path)
+			  enum disp_path_sel path, struct dsc_config *dsc_config)
 {
 	main_disp_path_setup(width, height, vrefresh, path);
 	rdma_start();

src/soc/mediatek/mt8195/ddp.c

@@ -5,6 +5,7 @@
 #include <edid.h>
 #include <soc/addressmap.h>
 #include <soc/ddp.h>
+#include <soc/display.h>
 
 #define MERGE_MODE	6
 #define MERGE_SWAP	0
@@ -151,7 +152,7 @@ void mtk_ddp_init(void)
 }
 
 void mtk_ddp_soc_mode_set(u32 fmt, u32 bpp, u32 width, u32 height, u32 vrefresh,
-			  enum disp_path_sel path)
+			  enum disp_path_sel path, struct dsc_config *dsc_config)
 {
 	main_disp_path_setup(width, height, vrefresh);
 	rdma_start();

src/soc/mediatek/mt8196/ddp.c

@@ -6,6 +6,7 @@
 #include <edid.h>
 #include <soc/addressmap.h>
 #include <soc/ddp.h>
+#include <soc/display.h>
 
 #define SIZE(w, h) ((u32)(h) << 16 | (w))
 #define DUAL_PIPE(path) ((path) == DISP_PATH_DUAL_MIPI)
@@ -429,7 +430,7 @@ void mtk_ddp_init(void)
 }
 
 void mtk_ddp_soc_mode_set(u32 fmt, u32 bpp, u32 width, u32 height, u32 vrefresh,
-			  enum disp_path_sel path)
+			  enum disp_path_sel path, struct dsc_config *dsc_config)
 {
 	if (width > 0x1FFF || height > 0x1FFF)
 		printk(BIOS_WARNING, "%s: w/h: %d/%d exceed hw limit %u\n", __func__,