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also rename the config option.

Browse source 
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5588 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2010-05-25 17:09:05 +00:00 • committed by Stefan Reinauer
commit 7e00a44b77
35 changed files with 66 additions and 66 deletions
Download patch file Download diff file Expand all files Collapse all files

4
src/mainboard/getac/p470/romstage.c
View file

@ -37,7 +37,7 @@
#include <console/console.h>
#include <cpu/x86/bist.h>
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
#define DBGP_DEFAULT 0
#include "southbridge/intel/i82801gx/i82801gx_usb_debug.c"
#include "pc80/usbdebug_serial.c"
@ -320,7 +320,7 @@ void main(unsigned long bist)
/* Set up the console */
uart_init();
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
i82801gx_enable_usbdebug(DBGP_DEFAULT);
early_usbdebug_init();
#endif

2
src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c
View file

@ -83,7 +83,7 @@ void hardwaremain(int ret_addr)
id = get_node_core_id_x();
//FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP
//FIXME: for USBDEBUG you need to make sure dbg_info get assigned in AP
print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n");
train_ram(id.nodeid, sysinfo, sysinfox);

4
src/mainboard/gigabyte/ga_2761gxdk/romstage.c
View file

@ -54,7 +54,7 @@
#include "pc80/mc146818rtc_early.c"
#include <console/console.h>
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
#include "southbridge/sis/sis966/sis966_enable_usbdebug.c"
#include "pc80/usbdebug_serial.c"
#endif
@ -199,7 +199,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
sis966_enable_usbdebug(DBGP_DEFAULT);
early_usbdebug_init();
#endif

2
src/mainboard/gigabyte/m57sli/ap_romstage.c
View file

@ -81,7 +81,7 @@ void hardwaremain(int ret_addr)
id = get_node_core_id_x();
//FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP
//FIXME: for USBDEBUG you need to make sure dbg_info get assigned in AP
print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n");
train_ram(id.nodeid, sysinfo, sysinfox);

4
src/mainboard/gigabyte/m57sli/romstage.c
View file

@ -52,7 +52,7 @@
#include "pc80/mc146818rtc_early.c"
#include <console/console.h>
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c"
#include "pc80/usbdebug_serial.c"
#endif
@ -212,7 +212,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
mcp55_enable_usbdebug(DBGP_DEFAULT);
early_usbdebug_init();
#endif

4
src/mainboard/intel/d945gclf/romstage.c
View file

@ -39,7 +39,7 @@
#include <console/console.h>
#include <cpu/x86/bist.h>
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
#define DBGP_DEFAULT 1
#include "southbridge/intel/i82801gx/i82801gx_usb_debug.c"
#include "pc80/usbdebug_serial.c"
@ -236,7 +236,7 @@ void main(unsigned long bist)
/* Set up the console */
uart_init();
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
i82801gx_enable_usbdebug(DBGP_DEFAULT);
early_usbdebug_init();
#endif

4
src/mainboard/kontron/986lcd-m/romstage.c
View file

@ -48,7 +48,7 @@
#include <console/console.h>
#include <cpu/x86/bist.h>
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
#define DBGP_DEFAULT 1
#include <usbdebug.h>
#include "southbridge/intel/i82801gx/i82801gx_usb_debug.c"
@ -380,7 +380,7 @@ void main(unsigned long bist)
/* Set up the console */
uart_init();
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
i82801gx_enable_usbdebug(DBGP_DEFAULT);
early_usbdebug_init();
#endif

2
src/mainboard/msi/ms7260/ap_romstage.c
View file

@ -67,7 +67,7 @@ void hardwaremain(int ret_addr)
id = get_node_core_id_x();
/* FIXME: For USBDEBUG_DIRECT you need to make sure dbg_info gets
/* FIXME: For USBDEBUG you need to make sure dbg_info gets
* assigned in AP.
*/
print_debug("CODE IN CACHE ON NODE:");

4
src/mainboard/msi/ms7260/romstage.c
View file

@ -56,7 +56,7 @@
#include "pc80/mc146818rtc_early.c"
#include <console/console.h>
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c"
#include "pc80/usbdebug_serial.c"
#endif
@ -181,7 +181,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
setup_mb_resource_map();
uart_init();
report_bist_failure(bist); /* Halt upon BIST failure. */
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
mcp55_enable_usbdebug(DBGP_DEFAULT);
early_usbdebug_init();
#endif

2
src/mainboard/msi/ms9652_fam10/Kconfig
View file

@ -159,7 +159,7 @@ config PCI_ROM_RUN
default y
depends on BOARD_MSI_MS9652_FAM10
config USBDEBUG_DIRECT
config USBDEBUG
bool
default n
depends on BOARD_MSI_MS9652_FAM10

4
src/mainboard/msi/ms9652_fam10/romstage.c
View file

@ -45,7 +45,7 @@
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include <console/console.h>
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c"
#include "pc80/usbdebug_serial.c"
#endif
@ -185,7 +185,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
mcp55_enable_usbdebug(DBGP_DEFAULT);
early_usbdebug_init();
#endif

2
src/mainboard/nvidia/l1_2pvv/ap_romstage.c
View file

@ -81,7 +81,7 @@ void hardwaremain(int ret_addr)
id = get_node_core_id_x();
//FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP
//FIXME: for USBDEBUG you need to make sure dbg_info get assigned in AP
print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n");
train_ram(id.nodeid, sysinfo, sysinfox);

4
src/mainboard/nvidia/l1_2pvv/romstage.c
View file

@ -52,7 +52,7 @@
#include "pc80/mc146818rtc_early.c"
#include <console/console.h>
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c"
#include "pc80/usbdebug_serial.c"
#endif
@ -198,7 +198,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
mcp55_enable_usbdebug(DBGP_DEFAULT);
early_usbdebug_init();
#endif

4
src/mainboard/roda/rk886ex/romstage.c
View file

@ -41,7 +41,7 @@
#include <console/console.h>
#include <cpu/x86/bist.h>
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
#define DBGP_DEFAULT 1
#include "southbridge/intel/i82801gx/i82801gx_usb_debug.c"
#include "pc80/usbdebug_serial.c"
@ -290,7 +290,7 @@ void main(unsigned long bist)
/* Set up the console */
uart_init();
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
i82801gx_enable_usbdebug(DBGP_DEFAULT);
early_usbdebug_init();
#endif

2
src/mainboard/tyan/s2912/ap_romstage.c
View file

@ -78,7 +78,7 @@ void hardwaremain(int ret_addr)
id = get_node_core_id_x();
//FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP
//FIXME: for USBDEBUG you need to make sure dbg_info get assigned in AP
print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n");
train_ram(id.nodeid, sysinfo, sysinfox);

4
src/mainboard/tyan/s2912/romstage.c
View file

@ -52,7 +52,7 @@
#include "pc80/mc146818rtc_early.c"
#include <console/console.h>
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c"
#include "pc80/usbdebug_serial.c"
#endif
@ -192,7 +192,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
mcp55_enable_usbdebug(DBGP_DEFAULT);
early_usbdebug_init();
#endif

4
src/mainboard/tyan/s2912_fam10/romstage.c
View file

@ -45,7 +45,7 @@
#include <cpu/x86/lapic.h>
#include "option_table.h"
#include <console/console.h>
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c"
#include "pc80/usbdebug_serial.c"
#endif
@ -180,7 +180,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
#if CONFIG_USBDEBUG_DIRECT
#if CONFIG_USBDEBUG
mcp55_enable_usbdebug(DBGP_DEFAULT);
early_usbdebug_init();
#endif