diff --git a/src/mainboard/starlabs/byte_adl/smihandler.c b/src/mainboard/starlabs/byte_adl/smihandler.c
new file mode 100644
index 0000000000..fa77eb0568
--- /dev/null
+++ b/src/mainboard/starlabs/byte_adl/smihandler.c
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+#include <arch/io.h>
+#include <cpu/x86/smm.h>
+#include <intelblocks/pmclib.h>
+#include <soc/gpe.h>
+#include <soc/iomap.h>
+#include <soc/pm.h>
+#include <types.h>
+
+void mainboard_smi_sleep_finalize(u8 slp_typ)
+{
+	if (slp_typ != ACPI_S5)
+		return;
+
+	/*
+	 * Keep LAN_WAKE# armed in S5 for WOL.
+	 * GPE0_LAN_WAK is GPE 112, which is bit 16 in the STD GPE block (127:96).
+	 */
+	const uint32_t lan_wake_mask = 1U << (GPE0_LAN_WAK - 96);
+
+	/* Clear any pending LAN_WAKE event to avoid immediate wake. */
+	outl(lan_wake_mask, ACPI_BASE_ADDRESS + GPE0_STS(GPE_STD));
+	pmc_enable_std_gpe(lan_wake_mask);
+	outl(lan_wake_mask, ACPI_BASE_ADDRESS + GPE0_STS(GPE_STD));
+}
diff --git a/src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb b/src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb
index ec5d3c03e9..0ea50a4f36 100644
--- a/src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb
+++ b/src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb
@@ -156,7 +156,7 @@ chip soc/intel/alderlake
 			}"
 			chip drivers/pcie/generic
 				register "wake_gpe" = "GPE0_LAN_WAK"
-				register "wake_deepest" = "ACPI_S3"
+				register "wake_deepest" = "ACPI_S5"
 				device generic 0 on end
 			end
 			smbios_slot_desc				"SlotTypePciExpressGen4x1"
@@ -174,7 +174,7 @@ chip soc/intel/alderlake
 			}"
 			chip drivers/pcie/generic
 				register "wake_gpe" = "GPE0_LAN_WAK"
-				register "wake_deepest" = "ACPI_S3"
+				register "wake_deepest" = "ACPI_S5"
 				device generic 0 on end
 			end
 			smbios_slot_desc				"SlotTypePciExpressGen3X4"