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superio/ite/it8772f/chip.h: Use 'bool' when appropriate

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Change-Id: I20c3298a920396718f0dc036e57faf8e46b82b2c
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70253
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Elyes Haouas 2022-12-02 08:42:04 +01:00 • committed by Felix Held
commit 7bde4e80be
4 changed files with 12 additions and 10 deletions
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4
src/mainboard/google/beltino/devicetree.cb
View file

@ -79,11 +79,11 @@ chip northbridge/intel/haswell
end
chip superio/ite/it8772f
# Skip keyboard init
register "skip_keyboard" = "1"
register "skip_keyboard" = "true"
# Enable PECI on TMPIN3
register "peci_tmpin" = "3"
# Enable FAN2
register "fan2_enable" = "1"
register "fan2_enable" = "true"
device pnp 2e.0 off end # FDC
device pnp 2e.1 on # Serial Port 1

4
src/mainboard/google/jecht/devicetree.cb
View file

@ -73,7 +73,7 @@ chip soc/intel/broadwell
end
chip superio/ite/it8772f
# Skip keyboard init
register "skip_keyboard" = "1"
register "skip_keyboard" = "true"
# Enable PECI on TMPIN3
register "peci_tmpin" = "3"
# Disable use of TMPIN1
@ -81,7 +81,7 @@ chip soc/intel/broadwell
# Enable Thermal Diode on TMPIN2
register "tmpin2_mode" = "1"
# Enable FAN2
register "fan2_enable" = "1"
register "fan2_enable" = "true"
# Default FAN2 speed
register "fan2_speed" = "0x4d"

4
src/mainboard/samsung/stumpy/devicetree.cb
View file

@ -69,11 +69,11 @@ chip northbridge/intel/sandybridge
# Enable GPIO52 as USBPWRON1#
register "gpio_set5" = "0x06"
# Skip keyboard init
register "skip_keyboard" = "1"
register "skip_keyboard" = "true"
# Enable PECI on TMPIN3
register "peci_tmpin" = "3"
# Enable FAN3
register "fan3_enable" = "1"
register "fan3_enable" = "true"
device pnp 2e.0 off end # FDC
device pnp 2e.1 on # Serial Port 1