mb/google/nissa/var/pujjoniru: Add 2 Micron modules to RAM id table

Add support for the new memory Micron MT62F1G32D2DS-031RF WT:C using
spd-3.hex, and MT62F2G32D4DS-031RF WT:C using spd-6.hex

DRAM Part Name                 ID to assign
K3KL6L60GM-MGCT                0 (0000)
H9JCNNNBK3MLYR-N6E             1 (0001)
H58G56CK8BX146                 2 (0010)
MT62F1G32D2DS-026 WT:B         3 (0011)
K3KL8L80CM-MGCT                3 (0011)
MT62F1G32D2DS-031RF WT:C       4 (0100)
MT62F2G32D4DS-031RF WT:C       5 (0101)

BUG=b:493068113
TEST=Normal boot

Change-Id: I03afd40346890e99b2be83dfabc1c3e95ef0bf8c
Signed-off-by: Qinghong Zeng <zengqinghong@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91083
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: hualin wei <weihualin@huaqin.corp-partner.google.com>
Reviewed-by: Eric Lai <ericllai@google.com>
This commit is contained in:
Qinghong Zeng 2026-02-03 10:28:23 +08:00 committed by Matt DeVillier
commit 7bcb90047e
3 changed files with 6 additions and 0 deletions

View file

@ -8,3 +8,5 @@ SPD_SOURCES += spd/lp5/set-0/spd-9.hex # ID = 0(0b0000) Parts = K3KL6L60GM
SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 1(0b0001) Parts = H9JCNNNBK3MLYR-N6E
SPD_SOURCES += spd/lp5/set-0/spd-11.hex # ID = 2(0b0010) Parts = H58G56CK8BX146
SPD_SOURCES += spd/lp5/set-0/spd-7.hex # ID = 3(0b0011) Parts = MT62F1G32D2DS-026 WT:B, K3KL8L80CM-MGCT
SPD_SOURCES += spd/lp5/set-0/spd-3.hex # ID = 4(0b0100) Parts = MT62F1G32D2DS-031RF WT:C
SPD_SOURCES += spd/lp5/set-0/spd-6.hex # ID = 5(0b0101) Parts = MT62F2G32D4DS-031RF WT:C

View file

@ -9,3 +9,5 @@ H9JCNNNBK3MLYR-N6E 1 (0001)
H58G56CK8BX146 2 (0010)
MT62F1G32D2DS-026 WT:B 3 (0011)
K3KL8L80CM-MGCT 3 (0011)
MT62F1G32D2DS-031RF WT:C 4 (0100)
MT62F2G32D4DS-031RF WT:C 5 (0101)

View file

@ -14,3 +14,5 @@ H9JCNNNBK3MLYR-N6E
H58G56CK8BX146
MT62F1G32D2DS-026 WT:B
K3KL8L80CM-MGCT
MT62F1G32D2DS-031RF WT:C
MT62F2G32D4DS-031RF WT:C