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Simplify a few code chunks, fix whitespace and indentation.

Browse source 
Also, remove some less useful comments, some dead code / unused functions.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Uwe Hermann 2010-11-21 22:47:22 +00:00
commit 7b997053eb
106 changed files with 462 additions and 1343 deletions
Download patch file Download diff file Expand all files Collapse all files

3
src/mainboard/intel/d945gclf/romstage.c
View file

@ -201,9 +201,8 @@ void main(unsigned long bist)
u32 reg32;
int boot_mode = 0;
if (bist == 0) {
if (bist == 0)
enable_lapic();
}
ich7_enable_lpc();
early_superio_config_lpc47m15x();

3
src/mainboard/intel/eagleheights/romstage.c
View file

@ -138,9 +138,8 @@ void main(unsigned long bist)
}
};
if (bist == 0) {
if (bist == 0)
enable_lapic();
}
/* Setup the console */
i3100_enable_superio();

17
src/mainboard/intel/jarrell/romstage.c
View file

@ -45,12 +45,6 @@ static void main(unsigned long bist)
static const struct mem_controller mch[] = {
{
.node_id = 0,
/*
.f0 = PCI_DEV(0, 0x00, 0),
.f1 = PCI_DEV(0, 0x00, 1),
.f2 = PCI_DEV(0, 0x00, 2),
.f3 = PCI_DEV(0, 0x00, 3),
*/
.channel0 = { DIMM2, DIMM1, DIMM0, 0 },
.channel1 = { DIMM6, DIMM5, DIMM4, 0 },
}
@ -59,9 +53,8 @@ static void main(unsigned long bist)
if (bist == 0) {
/* Skip this if there was a built in self test failure */
early_mtrr_init();
if (memory_initialized()) {
if (memory_initialized())
skip_romstage();
}
}
/* Setup the console */
@ -86,9 +79,8 @@ static void main(unsigned long bist)
/* config LPC decode for flash memory access */
device_t dev;
dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0);
if (dev == PCI_DEV_INVALID) {
if (dev == PCI_DEV_INVALID)
die("Missing ich5?");
}
pci_write_config32(dev, 0xe8, 0x00000000);
pci_write_config8(dev, 0xf0, 0x00);
@ -99,9 +91,8 @@ static void main(unsigned long bist)
#if 0
// dump_spd_registers(&cpu[0]);
int i;
for(i = 0; i < 1; i++) {
for(i = 0; i < 1; i++)
dump_spd_registers();
}
#endif
disable_watchdogs();
power_down_reset_check();
@ -111,8 +102,6 @@ static void main(unsigned long bist)
ich5_watchdog_on();
#if 0
dump_pci_devices();
#endif
#if 0
dump_pci_device(PCI_DEV(0, 0x00, 0));
dump_bar14(PCI_DEV(0, 0x00, 0));
#endif

3
src/mainboard/intel/truxton/romstage.c
View file

@ -68,9 +68,8 @@ static void main(unsigned long bist)
if (bist == 0) {
/* Skip this if there was a built in self test failure */
early_mtrr_init();
if (memory_initialized()) {
if (memory_initialized())
skip_romstage();
}
}
/* Set up the console */

4
src/mainboard/intel/xe7501devkit/romstage.c
View file

@ -46,15 +46,13 @@ static void main(unsigned long bist)
},
};
if (bist == 0)
{
if (bist == 0) {
// Skip this if there was a built in self test failure
early_mtrr_init();
enable_lapic();
}
// Get the serial port running and print a welcome banner
lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
uart_init();
console_init();