mb/google/ocelot/var/kodkod: Add overridetree
Add override devicetree based on schematic_20251112. BUG=b:452542491 TEST=emerge-ocelot coreboot Change-Id: I3a0e914ac463258bc475ff94ec9ad574707cad4a Signed-off-by: Ian Feng <ian_feng@compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/90069 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Pranava Y N <pranavayn@google.com>
This commit is contained in:
Ian Feng
Matt DeVillier
parent
aa1d44b644
commit
7b11254d58
2 changed files with 251 additions and 0 deletions
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@ -63,6 +63,9 @@ config BOARD_GOOGLE_MODEL_KODKOD
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select FSP_UGOP_EARLY_SIGN_OF_LIFE
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select EC_GOOGLE_CHROMEEC_RTK
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select EC_GOOGLE_CHROMEEC_LPC_GENERIC_MEMORY_RANGE
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select RT8168_GEN_ACPI_POWER_RESOURCE
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select RT8168_GET_MAC_FROM_VPD
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select RT8168_SET_LED_MODE
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select SPD_CACHE_ENABLE
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select SPD_CACHE_IN_FMAP
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@ -1,5 +1,253 @@
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chip soc/intel/pantherlake
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register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type C port - various configurations - TCP0
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register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type C port - various configurations - TCP1
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register "usb2_ports[2]" = "USB2_PORT_MID(OC0)" # USB3.2 Gen2x1 Type-A Port
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register "usb2_ports[3]" = "USB2_PORT_MID(OC0)" # USB3.2 Gen2x1 Type-A Port
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register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Camera
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register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Micro SD card
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register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Finger Print
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register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # USB 3.2 Gen2 x1 Type-A Con - # 1
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register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC0)" # USB 3.2 Gen2 x1 Type-A Con - # 2
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register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
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register "tcss_ports[1]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
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register "tcss_cap_policy[0]" = "TCSS_TYPE_C_PORT_FULL_FUN"
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register "tcss_cap_policy[1]" = "TCSS_TYPE_C_PORT_FULL_FUN"
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#gpe configuration
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register "pmc_gpe0_dw0" = "GPP_V"
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register "pmc_gpe0_dw1" = "GPP_B"
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register "pmc_gpe0_dw2" = "GPP_E"
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# Enable EDP in PortA & HDMI in Port B
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register "ddi_port_A_config" = "1"
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register "ddi_port_B_config" = "1"
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register "ddi_ports_config" = "{
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[DDI_PORT_A] = DDI_ENABLE_HPD,
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[DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
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}"
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register "serial_io_i2c_mode" = "{
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[PchSerialIoIndexI2C0] = PchSerialIoPci,
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[PchSerialIoIndexI2C1] = PchSerialIoPci,
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[PchSerialIoIndexI2C2] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C4] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C5] = PchSerialIoDisabled,
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}"
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register "serial_io_gspi_mode" = "{
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[PchSerialIoIndexGSPI0] = PchSerialIoDisabled,
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[PchSerialIoIndexGSPI1] = PchSerialIoDisabled,
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[PchSerialIoIndexGSPI0A] = PchSerialIoDisabled,
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}"
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# Intel Common SoC Config
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#+-------------------+---------------------------+
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#| Field | Value |
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#+-------------------+---------------------------+
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#| I2C0 | Touchpad |
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#| I2C1 | TPM(TI50) Early init is |
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#| | required to set up a BAR |
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#| | for TPM communication |
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#+-------------------+---------------------------+
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register "common_soc_config" = "{
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/* Render OEM footer logo 100px above from the edge */
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.logo_bottom_margin = 100,
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.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
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.i2c[0] = {
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.speed = I2C_SPEED_FAST,
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},
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.i2c[1] = {
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.speed = I2C_SPEED_FAST,
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.early_init = 1,
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},
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}"
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device domain 0 on
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device ref igpu on
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chip drivers/gfx/generic
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register "device_count" = "4"
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# DDIA for eDP
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register "device[0].name" = ""LCD0""
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register "device[0].type" = "panel"
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# DDIB for HDMI
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# If HDMI is not enumerated in the kernel, then no GFX device should be added for DDIB
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register "device[1].name" = ""DD01""
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# TCP0 (DP-1) for port C0
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register "device[2].name" = ""DD02""
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register "device[2].use_pld" = "true"
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register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
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# TCP1 (DP-2) for port C1
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register "device[3].name" = ""DD03""
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register "device[3].use_pld" = "true"
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register "device[3].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
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device generic 0 on end
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end
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end
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device ref iaa off end
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device ref tcss_xhci on
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chip drivers/usb/acpi
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device ref tcss_root_hub on
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C0""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(4, 2)"
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device ref tcss_usb3_port0 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C1""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(3, 2)"
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device ref tcss_usb3_port1 on end
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end
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end
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end
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end
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device ref xhci on
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chip drivers/usb/acpi
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device ref xhci_root_hub on
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-C Port C0""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(1, 1)"
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device ref usb2_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-C Port C1""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(2, 1)"
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device ref usb2_port2 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-A Port 1""
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register "type" = "UPC_TYPE_A"
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register "group" = "ACPI_PLD_GROUP(3, 1)"
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device ref usb2_port3 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-A Port 2""
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register "type" = "UPC_TYPE_A"
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register "group" = "ACPI_PLD_GROUP(4, 1)"
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device ref usb2_port4 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Camera""
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register "type" = "UPC_TYPE_INTERNAL"
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register "group" = "ACPI_PLD_GROUP(5, 1)"
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device ref usb2_port5 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Micro SD card""
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register "type" = "UPC_TYPE_INTERNAL"
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register "group" = "ACPI_PLD_GROUP(6, 1)"
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device ref usb2_port6 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 FPMCU""
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register "type" = "UPC_TYPE_INTERNAL"
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register "has_power_resource" = "true"
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device ref usb2_port7 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-A Port 1""
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register "type" = "UPC_TYPE_USB3_A"
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register "group" = "ACPI_PLD_GROUP(1, 2)"
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device ref usb3_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-A Port 2""
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register "type" = "UPC_TYPE_USB3_A"
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register "group" = "ACPI_PLD_GROUP(2, 2)"
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device ref usb3_port2 on end
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end
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end
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end
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end
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device ref pcie_rp1 on
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register "pcie_rp[PCIE_RP(1)]" = "{
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.clk_src = 3,
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.clk_req = 3,
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.flags = PCIE_RP_CLK_REQ_DETECT | PCIE_RP_LTR | PCIE_RP_AER,
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}"
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chip soc/intel/common/block/pcie/rtd3
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register "is_storage" = "true"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A08)"
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register "srcclk_pin" = "3"
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device generic 0 on end
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end
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end # Gen4 M.2 SSD
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device ref pcie_rp6 on
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register "pcie_rp[PCIE_RP(6)]" = "{
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.clk_src = 2,
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.clk_req = 2,
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.flags = PCIE_RP_LTR | PCIE_RP_AER,
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}"
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chip drivers/net
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register "customized_leds" = "0x05af"
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register "wake" = "GPE0_DW0_10" # GPP_V10
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register "device_index" = "0"
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register "enable_aspm_l1_2" = "1"
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register "add_acpi_dma_property" = "true"
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device pci 00.0 on end
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end
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end # LAN RTL8111H
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device ref cnvi_wifi on
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chip drivers/wifi/generic
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register "wake" = "GPE0_PME_B0"
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register "add_acpi_dma_property" = "true"
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register "enable_cnvi_ddr_rfim" = "true"
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use cnvi_bluetooth as bluetooth_companion
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device generic 0 on end
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end
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end # CNVi
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device ref cnvi_bluetooth on
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end
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device ref i2c0 on
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chip drivers/i2c/generic
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register "hid" = ""ELAN0000""
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register "desc" = ""ELAN Touchpad""
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register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E20_IRQ)"
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register "wake" = "GPE0_DW2_20"
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register "detect" = "1"
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device i2c 15 on end
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end
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end
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device ref i2c1 on
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chip drivers/i2c/tpm
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register "hid" = ""GOOG0005""
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register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_B17_IRQ)"
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device i2c 50 on end
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end
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end
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device ref smbus on end
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device ref hda on
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chip drivers/intel/soundwire
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device generic 0 on
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chip drivers/soundwire/alc711
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register "desc" = ""Headset Codec""
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register "alc711_address.version" = "SOUNDWIRE_VERSION_1_2"
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register "alc711_address.class" = "MIPI_CLASS_SDCA"
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register "alc711_address.part_id" = "MIPI_DEV_ID_REALTEK_ALC721"
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register "disable_clkstop_sm_support" = "true"
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# SoundWire Link 3 ID 0
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device generic 3.0 on end
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end
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end
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end
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end
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end
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end
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