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MSR names for L2 cache init

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Li-Ta Lo 2000-12-06 10:58:20 +00:00
commit 79ff9ed5cc
1 changed files with 18 additions and 0 deletions
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src/include/cpu/p6/l2_cache.h Normal file
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#ifndef __LINUXBIOS_P6_L2_CACHE_H
#define __LINUXBIOS_P6_L2_CACHE_H
#define EBL_CR_POWERON 0x2A
#define BBL_CR_D0 0x88
#define BBL_CR_D1 0x89
#define BBL_CR_D2 0x8A
#define BBL_CR_D3 0x8B
#define BBL_CR_ADDR 0x116
#define BBL_CR_DECC 0x118
#define BBL_CR_CTL 0x119
#define BBL_CR_TRIG 0x11A
#define BBL_CR_BUSY 0x11B
#define BBL_CR_CTL3 0x11E
#endif /* __LINUXBIOS_P6_L2_CACHE_H */