From 794418a132b5be5a2c049f28202da3cec7ce478d Mon Sep 17 00:00:00 2001 From: Vadim Bendebury Date: Thu, 1 May 2014 19:37:18 -0700 Subject: [PATCH] storm: ipq8064: enable CBFS SPI wrapper This change forces storm platform to use the common CBFS SPI wrapper, which makes the SOC specific CBFS code unnecessary and requires including SPI controller support in all coreboot stages. BUG=chrome-os-partner:27784 TEST=manual . with this change and the rest of the patches coreboot on AP148 comes up all the way to attempting to boot the payload (reading earlier stages from the SPI flash along the way). Change-Id: Ib468096f8e844deca11909293d90fc327aa99787 Signed-off-by: Vadim Bendebury Reviewed-on: https://chromium-review.googlesource.com/197932 Reviewed-by: Aaron Durbin Reviewed-by: David Hendricks --- src/mainboard/google/storm/Kconfig | 3 +++ src/soc/qualcomm/ipq806x/Makefile.inc | 6 +++--- src/soc/qualcomm/ipq806x/cbfs.c | 26 -------------------------- 3 files changed, 6 insertions(+), 29 deletions(-) delete mode 100644 src/soc/qualcomm/ipq806x/cbfs.c diff --git a/src/mainboard/google/storm/Kconfig b/src/mainboard/google/storm/Kconfig index 48369b9aa3..c19fd10cb3 100644 --- a/src/mainboard/google/storm/Kconfig +++ b/src/mainboard/google/storm/Kconfig @@ -22,8 +22,11 @@ if BOARD_GOOGLE_STORM config BOARD_SPECIFIC_OPTIONS def_bool y select ARCH_ARM + select COMMON_CBFS_SPI_WRAPPER select MAINBOARD_HAS_BOOTBLOCK_INIT select SOC_QC_IPQ806X + select SPI_FLASH + select SPI_FLASH_SPANSION config MAINBOARD_DIR string diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc index 73bdb6ead8..601d993735 100644 --- a/src/soc/qualcomm/ipq806x/Makefile.inc +++ b/src/soc/qualcomm/ipq806x/Makefile.inc @@ -18,21 +18,21 @@ ## bootblock-y += bootblock.c -bootblock-y += cbfs.c bootblock-y += clock.c bootblock-y += gpio.c +bootblock-$(CONFIG_SPI_FLASH) += spi.c bootblock-y += timer.c bootblock-$(CONFIG_CONSOLE_SERIAL_IPQ806X) += uart.c -romstage-y += cbfs.c romstage-y += clock.c romstage-y += gpio.c +romstage-$(CONFIG_SPI_FLASH) += spi.c romstage-y += timer.c romstage-$(CONFIG_CONSOLE_SERIAL_IPQ806X) += uart.c -ramstage-y += cbfs.c ramstage-y += clock.c ramstage-y += gpio.c +ramstage-$(CONFIG_SPI_FLASH) += spi.c ramstage-y += timer.c ramstage-$(CONFIG_CONSOLE_SERIAL_IPQ806X) += uart.c diff --git a/src/soc/qualcomm/ipq806x/cbfs.c b/src/soc/qualcomm/ipq806x/cbfs.c deleted file mode 100644 index 97ae548821..0000000000 --- a/src/soc/qualcomm/ipq806x/cbfs.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - - -#include /* This driver serves as a CBFS media source. */ - -int init_default_cbfs_media(struct cbfs_media *media) -{ - return 0; -}