diff --git a/src/soc/mediatek/mt8173/dramc_pi_basic_api.c b/src/soc/mediatek/mt8173/dramc_pi_basic_api.c
index 3a7aa0a87c..e3efec9cf8 100644
--- a/src/soc/mediatek/mt8173/dramc_pi_basic_api.c
+++ b/src/soc/mediatek/mt8173/dramc_pi_basic_api.c
@@ -539,7 +539,7 @@ void dramc_init(u32 channel, const struct mt8173_sdram_params *sdram_params)
 	write32(&ch[channel].ao_regs->conf1,
 		sdram_params->ac_timing.conf1);
 
-	/* bit 17,18 would bypass some dummy path*/
+	/* bit 17,18 would bypass some dummy path */
 	write32(&ch[channel].ddrphy_regs->dqsgctl, 0x1 << 31 |
 						   0x1 << 30 |
 						   0x1 << 17 |
diff --git a/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c b/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c
index 698cf42019..fa69f2e4c2 100644
--- a/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c
+++ b/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c
@@ -308,7 +308,7 @@ static u8 dqs_gw_fine_tune_calib(u32 channel, u8 fine_val)
 	s8 delta[7] = {-48, -32, -16, 0, 16, 32, 48};
 	int matches = 0, sum = 0;
 
-	/*fine tune range from 0 to 127*/
+	/* fine tune range from 0 to 127 */
 	fine_val = min(max(fine_val, 0 - delta[0]), 127 - delta[6]);
 
 	/* test gw fine tune */
@@ -322,7 +322,7 @@ static u8 dqs_gw_fine_tune_calib(u32 channel, u8 fine_val)
 	}
 
 	if (matches == 0) {
-		die("[GW] ERROR, No found fine tune\n");
+		die("[GW] ERROR, Fine-Tuning failed.\n");
 	}
 
 	opt_fine_val = fine_val + (sum / matches);
@@ -733,7 +733,7 @@ u8 rx_datlat_cal(u32 channel, u8 rank,
 
 	if (err[0]) {
 		/* dle test error */
-		printk(BIOS_ERR, "[DLE] CH:%d calibration ERROR CMP_ERR =%xh, \n",
+		printk(BIOS_ERR, "[DLE] CH:%d calibration ERROR CMP_ERR =%xh,\n",
 			channel, err[0]);
 	} else {
 		/* judge dle test result */