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soc/qualcomm/x1p42100: Avoid reserving display buffer region

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The display buffer was previously reserved as unavailable by coreboot,
which prevented the kernel from mapping it. When the splash driver
released the buffer, the kernel later crashed on access because the
region was never mapped.

This patch removes the reservation so the kernel can map the display
buffer and reuse it safely.

TEST=Create an image.serial.bin and ensure it boots on X1P42100.
Check that the display memory region is mapped by kernel in UART logs:

[    0.000000][    T0]   node   0: [mem 0x00000000e36a0000-
						0x00000000f7bfffff]

Change-Id: I507d48713690bac3030f81a29c7e123fd3a03b95
Signed-off-by: Venkateshwar S <vens@qualcomm.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90648
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Venkateshwar S 2025-12-30 00:36:39 -08:00 • committed by Matt DeVillier
commit 7896d94c76
1 changed files with 0 additions and 1 deletions
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src/soc/qualcomm/x1p42100/soc.c
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@ -51,7 +51,6 @@ static void soc_read_resources(struct device *dev)
reserved_ram_range(dev, index++, (uintptr_t)_dram_wlan, REGION_SIZE(dram_wlan));
reserved_ram_range(dev, index++, (uintptr_t)_dram_pil, REGION_SIZE(dram_pil));
reserved_ram_range(dev, index++, (uintptr_t)_dram_ta, REGION_SIZE(dram_ta));
reserved_ram_range(dev, index++, (uintptr_t)_dram_display, REGION_SIZE(dram_display));
/* ACDB carveout region located at 0xFF800000 - (n*5.5 +1+32+3) where n is size of DDR */
reserved_ram_range(dev, index++, (uintptr_t)(_dram_llcc_lpi - calc_acdb_carveout_size()),