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mb/google/rauru: Run mtk-fsp in romstage

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Run mtk_fsp_romstage.elf (MediaTek firmware support package for
romstage) in romstage to support power switch.

BUG=b:373797027
TEST=build pass, boot ok.
Load and run mtk_fsp with following logs:
[DEBUG]  FMAP: area FW_MAIN_A found @ 402000 (1527552 bytes)
[INFO ]  CBFS: Found 'fallback/mtk_fsp_romstage' @0xfc280 size 0x6bd in
         mcache @0x00122518
[INFO ]  VB2:vb2_digest_init() 1725 bytes, hash algo 2, HW acceleration
         enabled
[INFO ]  _start: MediaTek FSP_ROMSTAGE interface version: 1.0
[INFO ]  mtk_fsp_load_and_run: run fallback/mtk_fsp_romstage at phase
         0x30 done

Change-Id: Id223152e0bda71e99e72b34c91fea8f8841e824b
Signed-off-by: Jarried Lin <jarried.lin@mediatek.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86015
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jarried Lin 2025-01-16 14:28:42 +08:00 • committed by Yidi Lin
commit 784e2fc10e
1 changed files with 3 additions and 0 deletions
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3
src/mainboard/google/rauru/romstage.c
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@ -9,6 +9,7 @@
#include <soc/mt6363.h>
#include <soc/mt6373.h>
#include <soc/mt6685.h>
#include <soc/mtk_fsp.h>
#include <soc/mtk_pwrsel.h>
#include <soc/pcie.h>
#include <soc/pll.h>
@ -34,6 +35,8 @@ void platform_romstage_main(void)
mt6316_init();
raise_little_cpu_freq();
mt6373_init();
mtk_fsp_init(ROMSTAGE_INIT);
mtk_fsp_load_and_run();
mt6685_init();
srclken_rc_init();
clk_buf_init();