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cfl/cml/whl mainboards: Drop superfluous cpu_cluster device

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The cpu_cluster device is defined in the chipset devicetree. So drop it
from the mainboards.

Change-Id: I65bfeaf0b8771c123c0615531c2cc608b222949b
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83440
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Singer 2024-07-13 00:14:35 +02:00
commit 779f3c06f8
21 changed files with 0 additions and 41 deletions
Download patch file Download diff file Expand all files Collapse all files

2
src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb
View file

@ -55,8 +55,6 @@ chip soc/intel/cannonlake
register "gpe0_dw2" = "PMC_GPP_E"
# Actual device tree
device cpu_cluster 0 on end
device domain 0 on
subsystemid 0x1558 0x1401 inherit
device pci 00.0 on end # Host Bridge

2
src/mainboard/google/hatch/variants/baseboard/devicetree.cb
View file

@ -195,8 +195,6 @@ chip soc/intel/cannonlake
register "gpio_pm[COMM_3]" = "0"
register "gpio_pm[COMM_4]" = "0"
device cpu_cluster 0 on end
device domain 0 on
device ref igpu on end
device ref thermal on end

2
src/mainboard/google/puff/variants/baseboard/devicetree.cb
View file

@ -195,8 +195,6 @@ chip soc/intel/cannonlake
register "gpio_pm[COMM_3]" = "0"
register "gpio_pm[COMM_4]" = "0"
device cpu_cluster 0 on end
device domain 0 on
device ref igpu on end
device ref thermal on end

2
src/mainboard/intel/coffeelake_rvp/variants/baseboard/devicetree.cb
View file

@ -1,7 +1,5 @@
chip soc/intel/cannonlake
device cpu_cluster 0 on end
# FSP configuration
register "SaGv" = "SaGv_Enabled"
register "ScsEmmcHs400Enabled" = "1"

2
src/mainboard/intel/coffeelake_rvp/variants/cfl_h/overridetree.cb
View file

@ -1,7 +1,5 @@
chip soc/intel/cannonlake
device cpu_cluster 0 on end
# FSP configuration
register "RMT" = "1"

2
src/mainboard/intel/coffeelake_rvp/variants/cfl_s/overridetree.cb
View file

@ -1,7 +1,5 @@
chip soc/intel/cannonlake
device cpu_cluster 0 on end
# FSP configuration
register "RMT" = "1"

2
src/mainboard/intel/coffeelake_rvp/variants/cfl_u/overridetree.cb
View file

@ -1,7 +1,5 @@
chip soc/intel/cannonlake
device cpu_cluster 0 on end
register "PchHdaDspEnable" = "1"
register "PchHdaAudioLinkHda" = "1"

2
src/mainboard/intel/coffeelake_rvp/variants/cml_u/overridetree.cb
View file

@ -1,7 +1,5 @@
chip soc/intel/cannonlake
device cpu_cluster 0 on end
# Enable eDP device
register "DdiPortEdp" = "1"
# Enable HPD for DDI ports B/C

2
src/mainboard/intel/coffeelake_rvp/variants/whl_u/overridetree.cb
View file

@ -1,7 +1,5 @@
chip soc/intel/cannonlake
device cpu_cluster 0 on end
# Enable eDP device
register "DdiPortEdp" = "1"
# Enable HPD for DDI ports B/C/D/F

2
src/mainboard/prodrive/hermes/devicetree.cb
View file

@ -136,8 +136,6 @@ chip soc/intel/cannonlake
register "DisableHeciRetry" = "1"
device cpu_cluster 0 on end
device domain 0 on
device ref system_agent on end
device ref peg0 on # x8 / Slot 2

1
src/mainboard/protectli/vault_cml/devicetree.cb
View file

@ -139,7 +139,6 @@ chip soc/intel/cannonlake
[PchSerialIoIndexUART2] = PchSerialIoDisabled,
}"
device cpu_cluster 0 on end
device domain 0 on
device ref system_agent on end
device ref igpu on end

2
src/mainboard/purism/librem_cnl/devicetree.cb
View file

@ -41,8 +41,6 @@ chip soc/intel/cannonlake
register "gpe0_dw2" = "PMC_GPP_E"
# Actual device tree
device cpu_cluster 0 on end
device domain 0 on
device ref igpu on end
device ref dptf on

2
src/mainboard/purism/librem_l1um_v2/devicetree.cb
View file

@ -37,8 +37,6 @@ chip soc/intel/cannonlake
register "DisableHeciRetry" = "1"
device cpu_cluster 0 on end
device domain 0 on
device ref system_agent on end
device ref peg0 on # x16 or x8

2
src/mainboard/starlabs/starbook/variants/cml/devicetree.cb
View file

@ -50,8 +50,6 @@ chip soc/intel/cannonlake
register "PcieClkSrcClkReq[5]" = "PCIE_CLK_NOTUSED"
# Actual device tree.
device cpu_cluster 0 on end
device domain 0 on
device ref system_agent on end
device ref igpu on end

2
src/mainboard/system76/addw1/devicetree.cb
View file

@ -49,8 +49,6 @@ chip soc/intel/cannonlake
register "gpe0_dw2" = "PMC_GPP_E"
# Actual device tree
device cpu_cluster 0 on end
device domain 0 on
subsystemid 0x1558 0x65d1 inherit
device ref peg0 on

2
src/mainboard/system76/bonw14/devicetree.cb
View file

@ -52,8 +52,6 @@ chip soc/intel/cannonlake
register "gpe0_dw2" = "PMC_GPP_E"
# Actual device tree
device cpu_cluster 0 on end
device domain 0 on
subsystemid 0x1558 0x7714 inherit
device ref peg0 on

2
src/mainboard/system76/cml-u/devicetree.cb
View file

@ -56,8 +56,6 @@ chip soc/intel/cannonlake
register "gpe0_dw2" = "PMC_GPP_E"
# Actual device tree
device cpu_cluster 0 on end
device domain 0 on
device ref igpu on
register "gfx" = "GMA_DEFAULT_PANEL(0)"

2
src/mainboard/system76/gaze15/devicetree.cb
View file

@ -49,8 +49,6 @@ chip soc/intel/cannonlake
register "gpe0_dw2" = "PMC_GPP_E"
# Actual device tree
device cpu_cluster 0 on end
device domain 0 on
device ref peg0 on
# PCI Express Graphics #0 x16, Clock 8 (NVIDIA GPU)

2
src/mainboard/system76/oryp5/devicetree.cb
View file

@ -56,8 +56,6 @@ chip soc/intel/cannonlake
register "gpe0_dw2" = "PMC_GPP_E"
# Actual device tree
device cpu_cluster 0 on end
device domain 0 on
subsystemid 0x1558 0x95e6 inherit
device ref peg0 on

2
src/mainboard/system76/oryp6/devicetree.cb
View file

@ -54,8 +54,6 @@ chip soc/intel/cannonlake
register "gpe0_dw2" = "PMC_GPP_E"
# Actual device tree
device cpu_cluster 0 on end
device domain 0 on
device ref peg0 on
# PCI Express Graphics #0 x16, Clock 8 (NVIDIA GPU)

2
src/mainboard/system76/whl-u/devicetree.cb
View file

@ -56,8 +56,6 @@ chip soc/intel/cannonlake
register "gpe0_dw2" = "PMC_GPP_E"
# Actual device tree
device cpu_cluster 0 on end
device domain 0 on
device ref igpu on
register "gfx" = "GMA_STATIC_DISPLAYS(0)"