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nyan*: I2C: Fix bus clear BC_TERMINATE naming.

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In the original fix for the 'Lost arb' we were seeing on
Nyan* during reboot stress testing, I had the name of
BC_TERMINATE's bit setting wrong. Fix this to use the
IMMEDIATE (1) setting. The setting didn't change, just
the name. According to Julius this is the optimal
setting for bus clear in this instance. Also widened
the SCLK_THRESHOLD mask to 8 bits as per spec.

BUG=chrome-os-partner:28323
BRANCH=nyan
TEST=Tested on nyan. Built for nyan and nyan_big.

Change-Id: I19588690924b83431d9f4d3d2eb64f4947849a33
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/206409
Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
Tom Warren 2014-07-02 09:25:35 -07:00 • committed by chrome-internal-fetch
commit 76e08d0cb0
2 changed files with 4 additions and 4 deletions
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4
src/soc/nvidia/tegra/i2c.c
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@ -37,9 +37,9 @@ static void do_bus_clear(int bus)
// 1. Reset the I2C controller (already done)
// 2. Set the # of clock pulses required (using default of 9)
// 3. Select STOP condition (using default of 1 = STOP)
// 4. Set TERMINATE condition (1 = THRESHOLD)
// 4. Set TERMINATE condition (1 = IMMEDIATE)
bc = read32(&regs->bus_clear_config);
bc |= I2C_BUS_CLEAR_CONFIG_BC_TERMINATE_THRESHOLD;
bc |= I2C_BUS_CLEAR_CONFIG_BC_TERMINATE_IMMEDIATE;
write32(bc, &regs->bus_clear_config);
// 4.1 Set MSTR_CONFIG_LOAD and wait for clear
write32(I2C_CONFIG_LOAD_MSTR_CONFIG_LOAD_ENABLE, &regs->config_load);

4
src/soc/nvidia/tegra/i2c.h
View file

@ -115,9 +115,9 @@ enum {
enum {
I2C_BUS_CLEAR_CONFIG_BC_SCLK_THRESHOLD_SHIFT = 16,
I2C_BUS_CLEAR_CONFIG_BC_SCLK_THRESHOLD_MASK =
0x7f << I2C_BUS_CLEAR_CONFIG_BC_SCLK_THRESHOLD_SHIFT,
0xff << I2C_BUS_CLEAR_CONFIG_BC_SCLK_THRESHOLD_SHIFT,
I2C_BUS_CLEAR_CONFIG_BC_STOP_COND_STOP = 0x1 << 2,
I2C_BUS_CLEAR_CONFIG_BC_TERMINATE_THRESHOLD = 0x1 << 1,
I2C_BUS_CLEAR_CONFIG_BC_TERMINATE_IMMEDIATE = 0x1 << 1,
I2C_BUS_CLEAR_CONFIG_BC_ENABLE = 0x1 << 0,
I2C_BUS_CLEAR_STATUS_CLEARED = 0x1 << 0,