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arm: Fix checkstack() to use correct stack size

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checkstack() runs at the end of ramstage to warn about stack overflows,
and it assumes that CONFIG_STACK_SIZE is always the size of the stack to
check. This is only true for systems that bring up multiprocessing in
ramstage and assign a separate stack for each core, like x86 and ARM64.
Other architectures like ARM and MIPS (for now) don't touch secondary
CPUs at all and currently don't look like they'll ever need to, so they
generally stay on the same (SRAM-based) stack they have been on since
their bootblock.

This patch tries to model that difference by making these architectures
explicitly set CONFIG_STACK_SIZE to zero, and using that as a cue to
assume the whole (_estack - _stack) area in checkstack() instead. Also
adds a BUG() to the stack overflow check, since that is currently just
as non-fatal as the BIOS_ERR message (despite the incorrect "SYSTEM
HALTED" output) but a little more easy to spot. Such a serious failure
should not drown out in all the normal random pieces of lower case boot
spam (also, I was intending to eventually have a look at assert() and
BUG() to hopefully make them a little more useful/noticeable if I ever
find the time for it).

BRANCH=None
BUG=None
TEST=Booted Pinky, noticed it no longer complains about stack overflows.
Built Falco, Ryu and Urara.

Change-Id: I49f70bb7ad192bd1c48e077802085dc5ecbfd58b
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/235894
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 54229a725e8907b84a105c04ecea33b8f9b91dd4)
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/237021
Reviewed-by: David Hendricks <dhendrix@chromium.org>
This commit is contained in:
Julius Werner 2014-12-15 18:19:03 -08:00 • committed by chrome-internal-fetch
commit 75fdfeec7a
3 changed files with 22 additions and 8 deletions
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5
src/arch/arm/Kconfig
View file

@ -30,4 +30,9 @@ config ARM_LPAE
bool "Enable LPAE"
default n
# Mark SMP stack size as 0 since we keep using SRAM stack throughout ramstage.
config STACK_SIZE
hex
default 0x0
endmenu

5
src/arch/mips/Kconfig
View file

@ -34,4 +34,9 @@ config ARCH_RAMSTAGE_MIPS
bool
default n
# Mark SMP stack size as 0 since we keep using SRAM stack throughout ramstage.
config STACK_SIZE
hex
default 0x0
endmenu

20
src/lib/stack.c
View file

@ -20,31 +20,35 @@ it with the version available from LANL.
* rminnich@lanl.gov
*/
#include <assert.h>
#include <lib.h>
#include <console/console.h>
#include <symbols.h>
int checkstack(void *top_of_stack, int core)
{
/* Not all archs use CONFIG_STACK_SIZE, those who don't set it to 0. */
size_t stack_size = CONFIG_STACK_SIZE ? CONFIG_STACK_SIZE : _stack_size;
int i;
u32 *stack = (u32 *) (top_of_stack - CONFIG_STACK_SIZE);
u32 *stack = (u32 *) (top_of_stack - stack_size);
if (stack[0] != 0xDEADBEEF){
printk(BIOS_ERR, "Stack overrun on CPU%d. "
"Increase stack from current %d bytes\n",
core, CONFIG_STACK_SIZE);
"Increase stack from current %zu bytes\n",
core, stack_size);
BUG();
return -1;
}
for(i = 1; i < CONFIG_STACK_SIZE/sizeof(stack[0]); i++){
for(i = 1; i < stack_size/sizeof(stack[0]); i++){
if (stack[i] == 0xDEADBEEF)
continue;
printk(BIOS_SPEW, "CPU%d: stack: %p - %p, ",
core, stack,
&stack[CONFIG_STACK_SIZE/sizeof(stack[0])]);
core, stack, &stack[stack_size/sizeof(stack[0])]);
printk(BIOS_SPEW, "lowest used address %p, ", &stack[i]);
printk(BIOS_SPEW, "stack used: %ld bytes\n",
(unsigned long)&stack[CONFIG_STACK_SIZE /
sizeof(stack[0])] - (unsigned long)&stack[i]);
(unsigned long)&stack[stack_size / sizeof(stack[0])]
- (unsigned long)&stack[i]);
return 0;
}