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Move OPTION_TABLE to a menu config option, and default it to enabled. This allows

Browse source 
a user/developer to disable the option table, so it doesn't overwrite whatever
the factory BIOS has written. Also fix building with OPTION_TABLE disabled.

Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@1078 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Corey Osgood 2008-12-18 02:00:55 +00:00
commit 758fecb860
13 changed files with 9 additions and 23 deletions
Download patch file Download diff file Expand all files Collapse all files

8
Kconfig
View file

@ -53,6 +53,14 @@ config LOCALVERSION
help
Append an extra string to the end of the coreboot version.
config OPTION_TABLE
bool "CMOS Option Table"
default y
help
This option is used to determine whether the mainboard has
a battery backed up real time clock with CMOS NVRAM, or if you want
to use it.
config BEEPS
bool "Enable beeps upon certain coreboot events"
depends EXPERT

7
arch/x86/Kconfig
View file

@ -141,13 +141,6 @@ config CROSS_BAR_47_56
help
Configure for the type of crossbar on the mainboard.
config OPTION_TABLE
boolean
help
This option is used to determine whether the mainboard has
a battery backed up real time clock with CMOS NVRAM.
It is usually set in mainboard/*/Kconfig.
config PIRQ_TABLE
boolean
help

2
arch/x86/mc146818rtc.c
View file

@ -196,6 +196,7 @@ struct cmos_option_table *get_option_table(void)
int get_option(void *dest, char *name)
{
#if CONFIG_OPTION_TABLE
// struct cmos_option_table *option_table;
struct cmos_option_table *ct;
struct cmos_entries *ce;
@ -224,7 +225,6 @@ int get_option(void *dest, char *name)
if(!rtc_checksum_valid(CB_CKS_RANGE_START,
CB_CKS_RANGE_END,CB_CKS_LOC))
return(-4);
#ifdef CONFIG_OPTION_TABLE
return(0);
#else
return -2;

1
mainboard/adl/Kconfig
View file

@ -27,7 +27,6 @@ config BOARD_ADL_MSM800SEV
bool "MSM800SEV"
select ARCH_X86
select CPU_AMD_GEODELX
select OPTION_TABLE
select NORTHBRIDGE_AMD_GEODELX
select SOUTHBRIDGE_AMD_CS5536
select SUPERIO_WINBOND_W83627HF

4
mainboard/amd/Kconfig
View file

@ -27,7 +27,6 @@ config BOARD_AMD_DB800
bool "DB800"
select ARCH_X86
select CPU_AMD_GEODELX
select OPTION_TABLE
select NORTHBRIDGE_AMD_GEODELX
select SOUTHBRIDGE_AMD_CS5536
select SUPERIO_WINBOND_W83627HF
@ -38,7 +37,6 @@ config BOARD_AMD_DB800
config BOARD_AMD_DBM690T
bool "dbm690t"
select ARCH_X86
select OPTION_TABLE
select CPU_AMD_K8
select NORTHBRIDGE_AMD_K8
select SOUTHBRIDGE_AMD_SB600
@ -52,7 +50,6 @@ config BOARD_AMD_NORWICH
bool "Norwich"
select ARCH_X86
select CPU_AMD_GEODELX
select OPTION_TABLE
select NORTHBRIDGE_AMD_GEODELX
select SOUTHBRIDGE_AMD_CS5536
select PIRQ_TABLE
@ -62,7 +59,6 @@ config BOARD_AMD_NORWICH
config BOARD_AMD_SERENGETI
bool "Serengeti"
select ARCH_X86
select OPTION_TABLE
select CPU_AMD_K8
select NORTHBRIDGE_AMD_K8
select SOUTHBRIDGE_AMD_AMD8111

1
mainboard/amp/Kconfig
View file

@ -27,7 +27,6 @@ config BOARD_AMP_TINYGX
bool "TinyGX"
select ARCH_X86
select CPU_AMD_GEODELX
select OPTION_TABLE
select NORTHBRIDGE_AMD_GEODELX
select SOUTHBRIDGE_AMD_CS5536
select SUPERIO_ITE_IT8716F

2
mainboard/artecgroup/Kconfig
View file

@ -27,7 +27,6 @@ config BOARD_ARTECGROUP_DBE61
bool "DBE61"
select ARCH_X86
select CPU_AMD_GEODELX
select OPTION_TABLE
select NORTHBRIDGE_AMD_GEODELX
select SOUTHBRIDGE_AMD_CS5536
select PIRQ_TABLE
@ -38,7 +37,6 @@ config BOARD_ARTECGROUP_DBE62
bool "DBE62"
select ARCH_X86
select CPU_AMD_GEODELX
select OPTION_TABLE
select NORTHBRIDGE_AMD_GEODELX
select SOUTHBRIDGE_AMD_CS5536
select PIRQ_TABLE

1
mainboard/emulation/Kconfig
View file

@ -28,7 +28,6 @@ config BOARD_EMULATION_QEMU_X86
bool "QEMU x86"
select ARCH_X86
select CPU_I586
select OPTION_TABLE
select NORTHBRIDGE_INTEL_I440BXEMULATION
select SOUTHBRIDGE_INTEL_I82371EB
help

1
mainboard/gigabyte/Kconfig
View file

@ -26,7 +26,6 @@ choice
config BOARD_GIGABYTE_M57SLI
bool "GA-M57SLI-S4"
select ARCH_X86
select OPTION_TABLE
select CPU_AMD_K8
select NORTHBRIDGE_AMD_K8
select SOUTHBRIDGE_NVIDIA_MCP55

1
mainboard/jetway/Kconfig
View file

@ -25,7 +25,6 @@ config BOARD_JETWAY_J7F2
bool "J7F2 Series (INCOMPLETE)"
select ARCH_X86
select CPU_VIA_C7
select OPTION_TABLE
select NORTHBRIDGE_VIA_CN700
select SOUTHBRIDGE_VIA_VT8237
select SUPERIO_FINTEK_F71805F

1
mainboard/kontron/Kconfig
View file

@ -27,7 +27,6 @@ config BOARD_KONTRON_986LCD_M
bool "986LCD-M"
select ARCH_X86
select CPU_INTEL_CORE2
select OPTION_TABLE
select NORTHBRIDGE_INTEL_I945
select SOUTHBRIDGE_INTEL_I82801GX
select SUPERIO_WINBOND_W83627THG

2
mainboard/pcengines/Kconfig
View file

@ -27,7 +27,6 @@ config BOARD_PCENGINES_ALIX1C
bool "ALIX.1C"
select ARCH_X86
select CPU_AMD_GEODELX
select OPTION_TABLE
select NORTHBRIDGE_AMD_GEODELX
select SOUTHBRIDGE_AMD_CS5536
select SUPERIO_WINBOND_W83627HF
@ -39,7 +38,6 @@ config BOARD_PCENGINES_ALIX2C3
bool "ALIX.2C3"
select ARCH_X86
select CPU_AMD_GEODELX
select OPTION_TABLE
select NORTHBRIDGE_AMD_GEODELX
select SOUTHBRIDGE_AMD_CS5536
select PIRQ_TABLE

1
mainboard/via/Kconfig
View file

@ -26,7 +26,6 @@ config BOARD_VIA_EPIA_CN
bool "EPIA-CN"
select ARCH_X86
select CPU_VIA_C7
select OPTION_TABLE
select NORTHBRIDGE_VIA_CN700
select SOUTHBRIDGE_VIA_VT8237
select SUPERIO_VIA_VT1211