diff --git a/src/soc/intel/common/feature/soundwire/Kconfig b/src/soc/intel/common/feature/soundwire/Kconfig
new file mode 100644
index 0000000000..c53b0e39b8
--- /dev/null
+++ b/src/soc/intel/common/feature/soundwire/Kconfig
@@ -0,0 +1,24 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+config SOC_INTEL_COMMON_FEATURE_SOUNDWIRE
+	bool
+	help
+	  Intel Processor Common SoundWire support. This provides a common
+	  implementation of soc_fill_soundwire_controller() for platforms
+	  that use the same SoundWire link configuration. The platform must
+	  define SOC_SOUNDWIRE_ACPI_ADDRESS and SOC_SOUNDWIRE_MASTER_COUNT
+	  in their Kconfig.
+
+config SOC_SOUNDWIRE_ACPI_ADDRESS
+	hex
+	default 0x40000000
+	depends on SOC_INTEL_COMMON_FEATURE_SOUNDWIRE
+	help
+	  ACPI address for the SoundWire controller.
+
+config SOC_SOUNDWIRE_MASTER_COUNT
+	int
+	default 4
+	depends on SOC_INTEL_COMMON_FEATURE_SOUNDWIRE
+	help
+	  Number of SoundWire master interfaces supported by the platform.
diff --git a/src/soc/intel/common/feature/soundwire/Makefile.mk b/src/soc/intel/common/feature/soundwire/Makefile.mk
new file mode 100644
index 0000000000..a668fdbaa9
--- /dev/null
+++ b/src/soc/intel/common/feature/soundwire/Makefile.mk
@@ -0,0 +1,3 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+ramstage-$(CONFIG_SOC_INTEL_COMMON_FEATURE_SOUNDWIRE) += soundwire.c
diff --git a/src/soc/intel/common/feature/soundwire/soundwire.c b/src/soc/intel/common/feature/soundwire/soundwire.c
new file mode 100644
index 0000000000..d9528df1a7
--- /dev/null
+++ b/src/soc/intel/common/feature/soundwire/soundwire.c
@@ -0,0 +1,71 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi_soundwire.h>
+#include <console/console.h>
+#include <device/mmio.h>
+#include <device/soundwire.h>
+#include <drivers/intel/soundwire/soundwire.h>
+#include <intelblocks/pmclib.h>
+#include <stddef.h>
+#include <string.h>
+
+static const struct soundwire_link link_xtal_38_4 = {
+	.clock_stop_mode0_supported = 1,
+	.clock_stop_mode1_supported = 1,
+	.clock_frequencies_supported_count = 1,
+	.clock_frequencies_supported = { 4800 * KHz },
+	.default_frame_rate = 48 * KHz,
+	.default_frame_row_size = 50,
+	.default_frame_col_size = 4,
+	.dynamic_frame_shape = 1,
+	.command_error_threshold = 16,
+};
+
+static const struct soundwire_link link_xtal_24 = {
+	.clock_stop_mode0_supported = 1,
+	.clock_stop_mode1_supported = 1,
+	.clock_frequencies_supported_count = 1,
+	.clock_frequencies_supported = { 6 * MHz },
+	.default_frame_rate = 48 * KHz,
+	.default_frame_row_size = 125,
+	.default_frame_col_size = 2,
+	.dynamic_frame_shape = 1,
+	.command_error_threshold = 16,
+};
+
+static struct intel_soundwire_controller intel_controller = {
+	.acpi_address = CONFIG_SOC_SOUNDWIRE_ACPI_ADDRESS,
+	.sdw = {
+		.master_list_count = CONFIG_SOC_SOUNDWIRE_MASTER_COUNT
+	}
+};
+
+int soc_fill_soundwire_controller(struct intel_soundwire_controller **controller)
+{
+	const struct soundwire_link *link;
+	enum pch_pmc_xtal xtal = pmc_get_xtal_freq();
+	size_t i;
+
+	/* Select link config based on XTAL frequency and set IP clock. */
+	switch (xtal) {
+	case XTAL_24_MHZ:
+		link = &link_xtal_24;
+		intel_controller.ip_clock = 24 * MHz;
+		break;
+	case XTAL_38_4_MHZ:
+		link = &link_xtal_38_4;
+		intel_controller.ip_clock = 38400 * KHz;
+		break;
+	case XTAL_19_2_MHZ:
+	default:
+		printk(BIOS_ERR, "%s: XTAL not supported: 0x%x\n", __func__, xtal);
+		return -1;
+	}
+
+	/* Fill link config in controller map based on selected XTAL. */
+	for (i = 0; i < intel_controller.sdw.master_list_count; i++)
+		memcpy(&intel_controller.sdw.master_list[i], link, sizeof(*link));
+
+	*controller = &intel_controller;
+	return 0;
+}