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mb/google/ocelot: Fix EC sync IRQ configuration for board variants

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This patch corrects the EC sync IRQ configuration logic to properly
handle different ocelot board variants:

1. Update conditional compilation in ec.h to exclude OCELOTMCHP and
   OCELOTMCHP4ES variants from EC_ENABLE_SYNC_IRQ, as these boards do
   not have the EC sync IRQ connected.
2. Restructure GPIO definitions in gpio.h to:
 - Set EC_SYNC_IRQ to 0 (not connected) for OCELOTMCHP, OCELOTMCHP4ES,
   variants.
 - Enable EC_SYNC_IRQ on GPP_E08_IRQ for OCELOT, OCELOT4ES, OCELOTITE,
   and OCELOTITE4ES variants.
3. Configure GPP_E08 pad appropriately in gpio.c:
 - Set as NC (not connected) for OCELOTMCHP variants.
 - Configure as APIC interrupt for other variants that support EC sync
   IRQ functionality.

BUG=NONE
TEST=Build and boot on Ocelot variants.

Change-Id: I96e92ed9d6fa5b586ab9c0faf73d08b55abe4795
Signed-off-by: Appukuttan V K <appukuttan.vk@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89459
Reviewed-by: Usha P <usha.p@intel.com>
Reviewed-by: Krishna P Bhat D <krishna.p.bhat.d@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Appukuttan V K 2025-10-08 16:41:20 +05:30 • committed by Matt DeVillier
commit 7484a887b8
3 changed files with 12 additions and 4 deletions
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2
src/mainboard/google/ocelot/variants/baseboard/ocelot/include/baseboard/ec.h
View file

@ -75,7 +75,7 @@
/* Enable EC backed PD MCU device in ACPI */
#define EC_ENABLE_PD_MCU_DEVICE
#if !CONFIG(BOARD_GOOGLE_OCELOT) && !CONFIG(BOARD_GOOGLE_OCELOT4ES) && \
#if !CONFIG(BOARD_GOOGLE_OCELOTMCHP) && !CONFIG(BOARD_GOOGLE_OCELOTMCHP4ES) && \
!CONFIG(BOARD_GOOGLE_OJAL)
#define EC_ENABLE_SYNC_IRQ /* Enable tight timestamp / wake support */
#define EC_SYNC_IRQ_WAKE_CAPABLE /* Let the OS know ec_sync is wake capable */

7
src/mainboard/google/ocelot/variants/baseboard/ocelot/include/baseboard/gpio.h
View file

@ -12,11 +12,14 @@
* EC_SYNC_IRQ - GPIO IRQ for tight timestamps / wake support
* GPIO_PCH_WP - WP signal to PCH
*/
//TODO for Nuvo: #define EC_SYNC_IRQ GPP_E07_IRQ
#if CONFIG(BOARD_GOOGLE_MODEL_OCELOT) || CONFIG(BOARD_GOOGLE_MODEL_OJAL)
#if (CONFIG(BOARD_GOOGLE_OCELOTMCHP) || CONFIG(BOARD_GOOGLE_OCELOTMCHP4ES) \
|| CONFIG(BOARD_GOOGLE_MODEL_OJAL))
#define EC_SYNC_IRQ 0 /* Not Connected */
#elif CONFIG(BOARD_GOOGLE_MODEL_KODKOD)
#define EC_SYNC_IRQ GPP_F10_IRQ
#elif (CONFIG(BOARD_GOOGLE_OCELOT) || CONFIG(BOARD_GOOGLE_OCELOT4ES) \
|| CONFIG(BOARD_GOOGLE_OCELOTITE) || CONFIG(BOARD_GOOGLE_OCELOTITE4ES))
#define EC_SYNC_IRQ GPP_E08_IRQ
#elif CONFIG(BOARD_GOOGLE_MODEL_MATSU)
#define EC_SYNC_IRQ GPP_E08_IRQ
#endif

7
src/mainboard/google/ocelot/variants/ocelot/gpio.c
View file

@ -171,8 +171,13 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI_TRIG_OWN(GPP_E06, NONE, DEEP, LEVEL, ACPI),
/* GPP_E07: LAN_GPIO_RST_N */
PAD_CFG_GPO(GPP_E07, 1, PLTRST),
#if CONFIG(BOARD_GOOGLE_OCELOTMCHP) || CONFIG(BOARD_GOOGLE_OCELOTMCHP4ES)
/* GPP_E08: Not used */
PAD_NC(GPP_E08, NONE),
#else
/* GPP_E08: EC_SOC_INT_ODL */
PAD_CFG_GPI(GPP_E08, NONE, DEEP),
PAD_CFG_GPI_APIC_LOCK(GPP_E08, NONE, LEVEL, INVERT, LOCK_CONFIG),
#endif
/* GPP_E09: USB_FP_CONN_1_CONN_2_OC0_N */
PAD_CFG_NF(GPP_E09, NONE, DEEP, NF1),
/* GPP_E10: M2_UFS_DET_SEL_N */