From 74113f5d5e89f6cf81e077a2a4a1c9da66940f77 Mon Sep 17 00:00:00 2001 From: Kapil Porwal Date: Sun, 7 Sep 2025 19:40:46 +0530 Subject: [PATCH] drivers/intel/fsp2_0: Add options to config VGA mode 12 This commit adds new Kconfig options and a code snippet to support VGA mode 12 within the FSP (Firmware Support Package) 2.0. The changes allow platforms to select VGA mode 12 and configure it. The key features are: - Introduces `FSP_VGA_MODE12` to enable VGA mode 12 support. - A new `FSP_VGA_MODE12_BPP` option defines the bits per pixel, defaulting to 4 for color mode. - A bitmap buffer is allocated on the stack and supplied to FSP based on the configured bits per pixel. BUG=b:406725440 TEST=Verify VGA text rotation on Google/Felino. Change-Id: Iaa3a64b7c8c735d8329b3596f4be315871bc7fa4 Signed-off-by: Kapil Porwal Reviewed-on: https://review.coreboot.org/c/coreboot/+/89090 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik --- src/drivers/intel/fsp2_0/Kconfig | 15 +++++++++++++++ src/drivers/intel/fsp2_0/include/fsp/api.h | 6 ++++++ src/drivers/intel/fsp2_0/memory_init.c | 10 ++++++++++ 3 files changed, 31 insertions(+) diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index ed599d5e72..f864c344e7 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -500,4 +500,19 @@ config FSP_DIMM_INFO Select this option to retrieve DIMM (Memory) related information by relying on the Intel FSP. coreboot relies on this information to prepare SMBIOS table 17. +config FSP_VGA_MODE12 + bool + default n + depends on VGA || ROMSTAGE_VGA + help + Select this if the FSP supports VGA mode 12. + +config FSP_VGA_MODE12_BPP + hex + default 0x4 if FSP_VGA_MODE12 + default 0x0 + help + This is the number of bits per pixel used by FSP in VGA mode 12. + A bitmap buffer is allocated based on this value and supplied to FSP. + endif diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h index b9a58dbaa0..fa3c42c94e 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/api.h +++ b/src/drivers/intel/fsp2_0/include/fsp/api.h @@ -129,6 +129,12 @@ static inline void soc_load_logo_by_coreboot(void) { /* nop */ } static inline int soc_mark_gfx_memory(void) { return -1; } #endif +#if CONFIG(FSP_VGA_MODE12) +void soc_set_vga_mode12_buffer(FSPM_UPD *fspm_upd, uintptr_t buffer); +#else +static inline void soc_set_vga_mode12_buffer(FSPM_UPD *fspm_upd, uintptr_t buffer) { /* nop */ } +#endif + /* Update the SOC specific memory config param for mma. */ void soc_update_memory_params_for_mma(FSP_M_CONFIG *memory_cfg, struct mma_config_param *mma_cfg); diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index f6945a2313..f3cb529caa 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -405,6 +405,16 @@ static void do_fsp_memory_init(const struct fspm_context *context, bool s3wake) /* Reserve enough memory under TOLUD to save CBMEM header */ arch_upd->BootLoaderTolumSize = cbmem_overhead_size(); +#if CONFIG_FSP_VGA_MODE12_BPP + /* Allocate a buffer for VGA mode 12 on the stack since we do not have + * memory available yet. It is done here to avoid deallocation before + * calling FSP-M. + */ + unsigned char temp_vga_buffer[CONFIG_FSP_VGA_MODE12_BPP * VGA12_BITMAP_BUFFER_SZ]; + memset(temp_vga_buffer, 0, sizeof(temp_vga_buffer)); + soc_set_vga_mode12_buffer(&fspm_upd, (uintptr_t)temp_vga_buffer); +#endif + /* Fill common settings on behalf of chipset. */ if (fsp_fill_common_arch_params(arch_upd, s3wake, version, memmap) != CB_SUCCESS)