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F15tn: Fix all warnings, enable warnings as errors

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Enable 'all warnings being treated as errors' in thatcher and parmer.

Fixed the following warnings on parmer / thatcher:
src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatureLeveling.c:
 In function 'GetGlobalCpuFeatureListAddress':
src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatureLeveling.c:291:14:
 warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c:
 In function 'SaveDeviceContext':
src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c:245:18:
 warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c:309:16:
 warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]

src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPostInit.c:
 In function 'GetPstateGatherDataAddressAtPost':
src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPostInit.c:235:10:
 warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mntn.c:
 In function 'MemNInitNBDataTN':
src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mntn.c:353:32:
 warning: assignment from incompatible pointer type [enabled by default]
src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mntn.c:363:23:
 warning: assignment from incompatible pointer type [enabled by default]

src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatureLeveling.c:
 In function 'GetGlobalCpuFeatureListAddress':
src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatureLeveling.c:291:14:
 warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c:
 In function 'SaveDeviceContext':
src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c:245:18:
 warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c:309:16:
 warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]

In file included from src/northbridge/amd/agesa/family15tn/northbridge.c:37:0:
src/vendorcode/amd/agesa/f15tn/AGESA.h:1547:0:
 warning: "TOP_MEM" redefined [enabled by default]
src/include/cpu/amd/mtrr.h:31:0:
 note: this is the location of the previous definition
src/vendorcode/amd/agesa/f15tn/AGESA.h:1548:0:
 warning: "TOP_MEM2" redefined [enabled by default]
src/include/cpu/amd/mtrr.h:34:0:
 note: this is the location of the previous definition
In file included from src/northbridge/amd/agesa/family15tn/northbridge.c:41:0:
src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuRegisters.h:378:0:
 warning: "LOCAL_APIC_ADDR" redefined [enabled by default]
src/include/cpu/x86/lapic_def.h:9:0: note:
 this is the location of the previous definition

In file included from src/mainboard/amd/parmer/BiosCallOuts.h:24:0,
                 from src/mainboard/amd/parmer/mainboard.c:28:
src/vendorcode/amd/agesa/f15tn/AGESA.h:1547:0:
 warning: "TOP_MEM" redefined [enabled by default]
src/include/cpu/amd/mtrr.h:31:0:
 note: this is the location of the previous definition
src/vendorcode/amd/agesa/f15tn/AGESA.h:1548:0:
 warning: "TOP_MEM2" redefined [enabled by default]
src/include/cpu/amd/mtrr.h:34:0: note:
 this is the location of the previous definition

Change-Id: Iecea28232f1761401cf09f7d2a77d3fbac2f5801
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/2171
Tested-by: build bot (Jenkins)
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Martin Roth 2013-01-17 16:28:30 -07:00 • committed by Patrick Georgi
commit 73e86a88d2
12 changed files with 15 additions and 19 deletions
Download patch file Download diff file Expand all files Collapse all files

2
src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatureLeveling.c
View file

@ -288,5 +288,5 @@ GetGlobalCpuFeatureListAddress (
AddressValue = GLOBAL_CPU_FEATURE_LIST_TEMP_ADDR;
*Address = (UINT64 *)(AddressValue);
*Address = (UINT64 *)(intptr_t)(AddressValue);
}

4
src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c
View file

@ -242,7 +242,7 @@ SaveDeviceContext (
UINT64 EndAddress;
VOID *OrMask;
StartAddress = (UINT64)DeviceList;
StartAddress = (UINT64)(intptr_t)DeviceList;
Device.CommonDeviceHeader = (DEVICE_DESCRIPTOR *) &DeviceList[1];
OrMask = (UINT8 *) DeviceList + DeviceList->RelativeOrMaskOffset;
@ -306,7 +306,7 @@ SaveDeviceContext (
break;
}
}
EndAddress = (UINT64) OrMask;
EndAddress = (UINT64)(intptr_t)OrMask;
*ActualBufferSize = (UINT32) (EndAddress - StartAddress);
}

2
src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuPostInit.c
View file

@ -232,7 +232,7 @@ GetPstateGatherDataAddressAtPost (
AddressValue = P_STATE_DATA_GATHER_TEMP_ADDR;
*Ptr = (UINT64 *)(AddressValue);
*Ptr = (UINT64 *)(intptr_t)(AddressValue);
return AGESA_SUCCESS;
}

4
src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuRegisters.h
View file

@ -375,7 +375,11 @@ typedef struct {
#define LAPIC_BASE_ADDR_MASK 0x0000FFFFFFFFF000ull
#define APIC_EXT_BRDCST_MASK 0x000E0000ul
#define APIC_ENABLE_BIT 0x00000800ul
#ifndef LOCAL_APIC_ADDR
#define LOCAL_APIC_ADDR 0xFEE00000ul
#endif
#define INT_CMD_REG_LO 0x300
#define INT_CMD_REG_HI 0x310
#define REMOTE_MSG_REG 0x380

2
src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mntn.c
View file

@ -350,7 +350,7 @@ MemNInitNBDataTN (
NBPtr->ProgramCycTimings = MemNProgramCycTimingsUnb;
NBPtr->SyncDctsReady = (BOOLEAN (*) (MEM_NB_BLOCK *)) memDefTrue;
NBPtr->HtMemMapInit = MemNHtMemMapInitTN;
NBPtr->SyncAddrMapToAllNodes = (BOOLEAN (*) (MEM_NB_BLOCK *)) memDefTrue;
NBPtr->SyncAddrMapToAllNodes = (VOID (*) (MEM_NB_BLOCK *)) memDefRet;
NBPtr->CpuMemTyping = MemNCPUMemTypingNb;
NBPtr->BeforeDqsTraining = MemNBeforeDQSTrainingTN;
NBPtr->AfterDqsTraining = MemNAfterDQSTrainingTN;

4
src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mn.c
View file

@ -514,13 +514,13 @@ MemNInsDlyCompareTestPatternNb (
*
* @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
*/
BOOLEAN
VOID
MemNTrainingFlowUnb (
IN OUT MEM_NB_BLOCK *NBPtr
)
{
memNTrainFlowControl[DDR3_TRAIN_FLOW] (NBPtr);
return TRUE;
return;
}
/*----------------------------------------------------------------------------
* LOCAL FUNCTIONS

2
src/vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h
View file

@ -1417,7 +1417,7 @@ GetTrainDlyFromHeapNb (
IN DRBN Drbn
);
BOOLEAN
VOID
MemNTrainingFlowUnb (
IN OUT MEM_NB_BLOCK *NBPtr
);