From 715d461401e782a9d264fddf9ca591b9d14abfe3 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Wed, 22 Jan 2025 16:32:13 +0530 Subject: [PATCH] Revert "UPSTREAM: soc/intel/pantherlake: Update PlatformDebugOption to Trace Ready" MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This default configuration caused a problem where USB devices connected behind a powered hub and/or Servo v4.1 were not detected. Reverting this change restores the previous behavior where Trace Hub and DCI are disabled by default, resolving the USB detection issue. BUG=b:384453901 TEST=Able to boot google/fatcat using USB storage behind servo v4.1 This reverts commit 1ed186fbff84386e0196dd30dd7bc89b8fec2cec. Change-Id: I1a0f66d7ddf84622820f82c559d7d6b846ba3a7d Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/86105 Reviewed-by: Jamie Ryu Reviewed-by: Jérémy Compostella Reviewed-by: Bora Guvendik Tested-by: build bot (Jenkins) Reviewed-by: Pranava Y N Reviewed-by: Gaggery Tsai --- src/soc/intel/pantherlake/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/src/soc/intel/pantherlake/Kconfig b/src/soc/intel/pantherlake/Kconfig index 4f6f658fc1..dde401bfb5 100644 --- a/src/soc/intel/pantherlake/Kconfig +++ b/src/soc/intel/pantherlake/Kconfig @@ -95,7 +95,6 @@ config SOC_INTEL_PANTHERLAKE_BASE select SOC_INTEL_CSE_LITE_PSR if MAINBOARD_HAS_CHROMEOS && SOC_INTEL_CSE_LITE_SKU select SOC_INTEL_CSE_SEND_EOP_LATE if !MAINBOARD_HAS_CHROMEOS select SOC_INTEL_CSE_SET_EOP - select SOC_INTEL_DEBUG_CONSENT # TODO: Remove the safe setting for ES SoC select SOC_INTEL_GFX_NON_PREFETCHABLE_MMIO select SOC_INTEL_IOE_DIE_SUPPORT select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION