mb/emulation/qemu-riscv: Add support for 512 harts

QEMU has a maximum of 512 of emulated harts supported.

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I149c8d8a43733c8ba3e02a84b0a3606d98f8b2c1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81083
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Alicja Michalska <ahplka19@gmail.com>
Reviewed-by: Carlos López <carlos.lopezr4096@gmail.com>
This commit is contained in:
Maximilian Brune 2024-03-01 16:17:45 +01:00 committed by Matt DeVillier
commit 70ca54bf37
5 changed files with 36 additions and 2 deletions

View file

@ -32,6 +32,7 @@ romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += fsp_relocate.c
endif
ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += fsp_relocate.c
bootblock-$(CONFIG_FLATTENED_DEVICE_TREE) += device_tree.c
romstage-$(CONFIG_FLATTENED_DEVICE_TREE) += device_tree.c
ramstage-$(CONFIG_FLATTENED_DEVICE_TREE) += device_tree.c

View file

@ -26,6 +26,7 @@ config BOARD_SPECIFIC_OPTIONS
select FLATTENED_DEVICE_TREE
select MISSING_BOARD_RESET
select DRIVERS_UART_8250MEM
select RISCV_GET_HART_COUNT_AT_RUNTIME
select RISCV_HAS_OPENSBI
select ARCH_RISCV_S
select ARCH_RISCV_U
@ -35,6 +36,7 @@ config BOARD_SPECIFIC_OPTIONS
select ARCH_ROMSTAGE_RISCV
select ARCH_RAMSTAGE_RISCV
select RISCV_USE_ARCH_TIMER
select FLATTENED_DEVICE_TREE
config MEMLAYOUT_LD_FILE
string
@ -48,7 +50,7 @@ config MAINBOARD_PART_NUMBER
config MAX_CPUS
int
default 1
default 512 # QEMUs current limit for the virt target
config RISCV_ARCH
string

View file

@ -4,12 +4,14 @@ bootblock-y += mainboard.c
bootblock-y += uart.c
bootblock-y += rom_media.c
bootblock-y += clint.c
bootblock-y += smp.c
romstage-y += cbmem.c
romstage-y += romstage.c
romstage-y += uart.c
romstage-y += rom_media.c
romstage-y += clint.c
romstage-y += smp.c
ramstage-y += mainboard.c
ramstage-y += uart.c
@ -17,5 +19,6 @@ ramstage-y += rom_media.c
ramstage-y += clint.c
ramstage-y += cbmem.c
ramstage-y += chip.c
ramstage-y += smp.c
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include

View file

@ -16,5 +16,5 @@ SECTIONS
PRERAM_CBMEM_CONSOLE(QEMU_VIRT_DRAM + 128K + 256K + 256K + 2M, 8K)
FMAP_CACHE(QEMU_VIRT_DRAM + 128K + 256K + 256K + 2M + 8K, 2K)
CBFS_MCACHE(QEMU_VIRT_DRAM + 128K + 256K + 256K + 2M + 8K + 2K, 10K)
STACK(QEMU_VIRT_DRAM + 128K + 256K + 256K + 2M + 8K + 2K + 10K, 4M)
STACK(QEMU_VIRT_DRAM + 128K + 256K + 256K + 2M + 8K + 2K + 10K, 4K * CONFIG_MAX_CPUS)
}

View file

@ -0,0 +1,28 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <mcall.h>
#include <arch/smp/smp.h>
#include <commonlib/device_tree.h>
#include <console/console.h>
unsigned int smp_get_hart_count(void)
{
if (!fdt_is_valid(HLS()->fdt))
goto error;
uint32_t cpus_offset = fdt_find_node_by_path(HLS()->fdt, "/cpus", NULL, NULL);
if (!cpus_offset)
goto error;
static u32 harts[CONFIG_MAX_CPUS]; // too big for the stack
size_t count_harts = fdt_find_subnodes_by_prefix(HLS()->fdt, cpus_offset, "cpu@",
NULL, NULL, harts, CONFIG_MAX_CPUS);
if (!count_harts)
goto error;
printk(BIOS_DEBUG, "found %zu harts in devicetree\n", count_harts);
return count_harts;
error:
printk(BIOS_ERR, "%s: Failed to read devicetree to get number of harts\n", __func__);
return 1; // Return single hart on failure to keep booting
}