diff --git a/src/ec/google/chromeec/acpi/ec.asl b/src/ec/google/chromeec/acpi/ec.asl
index f04ce6ab54..436207cb13 100644
--- a/src/ec/google/chromeec/acpi/ec.asl
+++ b/src/ec/google/chromeec/acpi/ec.asl
@@ -108,6 +108,9 @@ Device (EC0)
 	OperationRegion (EMEM, EmbeddedControl,
 			 EC_ACPI_MEM_MAPPED_BEGIN, EC_ACPI_MEM_MAPPED_SIZE)
 	Field (EMEM, ByteAcc, Lock, Preserve)
+#elif CONFIG(EC_GOOGLE_CHROMEEC_LPC_GENERIC_MEMORY_RANGE)
+	OperationRegion (EMEM, SystemMemory, \_SB.PCI0.LPCB.GLGM() + 0x100, EC_MEMMAP_SIZE)
+	Field (EMEM, ByteAcc, NoLock, Preserve)
 #else
 	OperationRegion (EMEM, SystemIO, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE)
 	Field (EMEM, ByteAcc, NoLock, Preserve)
diff --git a/src/ec/google/chromeec/acpi/emem.asl b/src/ec/google/chromeec/acpi/emem.asl
index 59395f3bc5..aa635557a6 100644
--- a/src/ec/google/chromeec/acpi/emem.asl
+++ b/src/ec/google/chromeec/acpi/emem.asl
@@ -1,7 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 /*
- * EMEM data may be accessed through port 62/66 or through LPC at 900h.
+ * EMEM data may be accessed through port 62/66 or through LPC at 900h
+ * or through LPC GMR (Generic Memory Range) MMIO range.
  */
 
 TIN0, 8,	// Temperature 0