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Rambi: Set SOC_DISP_ON as GPIO to avoid LCD_VCC glitch

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To avoid LCD_VCC glitch on cold reset, set SOC_DISP_ON as GPIO output high.
After gfx initialize was done set it to native funtion 2.

BUG=chrome-os-partner:25159
BRANCH=firmware-rambi-5216.B
TEST=Tested on Rambi and squawks, no LCD_VCC glitch anymore.

Change-Id: If16af498e910a8da1d77a9a66456eb767286a61a
Original-Change-Id: Icf62588fa0338f89fafb3fe9246c26f16bcdaa60
Signed-off-by: Kein Yuan <kein.yuan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/197985
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org>
Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
This commit is contained in:
Kein Yuan 2014-05-01 20:20:06 -07:00 • committed by chrome-internal-fetch
commit 6f7d621678
2 changed files with 11 additions and 1 deletions
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2
src/mainboard/google/rambi/gpio.c
View file

@ -33,7 +33,7 @@ static const struct soc_gpio_map gpncore_gpio_map[] = {
GPIO_FUNC2, /* S0_NC06 - EDP_HPD_L */
GPIO_INPUT, /* S0_NC07 - DDI1_DDCDATA - STRAP */
GPIO_NC, /* S0_NC08 - NC */
GPIO_FUNC2, /* S0_NC09 - SOC_DISP_ON_C */
GPIO_OUT_HIGH, /* S0_NC09 - SOC_DISP_ON_C */
GPIO_FUNC2, /* S0_NC10 - SOC_EDP_BLON_C */
GPIO_FUNC2, /* S0_NC11 - SOC_DPST_PWM_C */
GPIO_NC, /* S0_NC12 - NC */

10
src/mainboard/google/rambi/mainboard.c
View file

@ -36,6 +36,8 @@
#include <smbios.h>
#include "ec.h"
#include "onboard.h"
#include <baytrail/gpio.h>
#include <bootstate.h>
void mainboard_suspend_resume(void)
{
@ -175,3 +177,11 @@ struct chip_operations mainboard_ops = {
.enable_dev = mainboard_enable,
};
static void edp_vdden_cb(void *unused)
{
ncore_select_func(SOC_DDI1_VDDEN_PAD, PAD_FUNC2);
}
BOOT_STATE_INIT_ENTRIES(edp_vdden_bscb) = {
BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, edp_vdden_cb, NULL),
};