UPSTREAM: soc/intel/apollolake: Use Intel timer common code

BUG=none
BRANCH=none
TEST=none

Change-Id: If18005866011f1103bf9d95376a9ffdde035139f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4c9cf304c7
Original-Change-Id: I7b415711d01ddc0d998eba62de2c2139045efa80
Original-Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Original-Reviewed-on: https://review.coreboot.org/19913
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/524604

src/soc/intel/apollolake/Kconfig

@@ -62,6 +62,7 @@ config CPU_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON_BLOCK_SA
 	select SOC_INTEL_COMMON_BLOCK_RTC
 	select SOC_INTEL_COMMON_BLOCK_SA
+	select SOC_INTEL_COMMON_BLOCK_TIMER
 	select SOC_INTEL_COMMON_BLOCK_UART
 	select SOC_INTEL_COMMON_BLOCK_XDCI
 	select SOC_INTEL_COMMON_BLOCK_XHCI

src/soc/intel/apollolake/tsc_freq.c

@@ -23,12 +23,6 @@
 #include <delay.h>
 #include "chip.h"
 
-unsigned long tsc_freq_mhz(void)
-{
-	msr_t msr = rdmsr(MSR_PLATFORM_INFO);
-	return (CONFIG_CPU_BCLK_MHZ * ((msr.lo >> 8) & 0xff));
-}
-
 void set_max_freq(void)
 {
 	msr_t msr, msr_rd;