mb/starlabs/starbook/*: Tidy GPIO comments for HDA

This is a non-functional change, and only makes the GPIOs easier to read.

Change-Id: I5ba2e400ec57a0c52523ea360bee17d9517454b5
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87110
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sean Rhodes 2025-04-02 13:50:31 +01:00
commit 6dd323e159
7 changed files with 49 additions and 70 deletions

View file

@ -56,6 +56,13 @@ const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1), /* HDMI Data */
PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), /* TCP0 Hot Plug */
/* High-Definition Audio */
PAD_CFG_NF(GPP_R0, NATIVE, DEEP, NF1), /* Clock */
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1), /* Sync */
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1), /* Data Output */
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1), /* Data Input */
PAD_CFG_NF(GPP_R4, NATIVE, DEEP, NF1), /* Reset */
/* GPD2: LAN Wake */
PAD_NC(GPD2, NONE),
/* GPD6: Sleep A */
@ -421,16 +428,6 @@ const struct pad_config gpio_table[] = {
/* T15: Not Connected */
PAD_NC(GPP_T15, NONE),
/* R0: HDA BCLK */
PAD_CFG_NF(GPP_R0, NATIVE, DEEP, NF1),
/* R1: HDA SYNC */
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1),
/* R2: HDA SDO */
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1),
/* R3: HDA SDI */
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),
/* R4: HDA Reset */
PAD_CFG_NF(GPP_R4, NATIVE, DEEP, NF1),
/* R5: Not Connected */
PAD_NC(GPP_R5, NONE),
/* R6: Not Connected */

View file

@ -57,6 +57,13 @@ const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1), /* HDMI Data */
PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), /* TCP0 Hot Plug */
/* High-Definition Audio */
PAD_CFG_NF(GPP_R0, NATIVE, DEEP, NF1), /* Clock */
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1), /* Sync */
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1), /* Data Output */
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1), /* Data Input */
PAD_CFG_NF(GPP_R4, NATIVE, DEEP, NF1), /* Reset */
/* GPD2: LAN Wake */
PAD_NC(GPD2, NONE),
/* GPD6: Sleep A */
@ -423,16 +430,6 @@ const struct pad_config gpio_table[] = {
/* T15: Not Connected */
PAD_NC(GPP_T15, NONE),
/* R0: HDA BCLK */
PAD_CFG_NF(GPP_R0, NATIVE, DEEP, NF1),
/* R1: HDA SYNC */
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1),
/* R2: HDA SDO */
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1),
/* R3: HDA SDI */
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),
/* R4: HDA Reset */
PAD_CFG_NF(GPP_R4, NATIVE, DEEP, NF1),
/* R5: MiPi Cam Reset */
PAD_NC(GPP_R5, NONE),
/* R6: Not Connected */

View file

@ -64,6 +64,13 @@ const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_C06, NONE, DEEP, NF1), /* SML Clock */
PAD_CFG_NF(GPP_C07, NONE, DEEP, NF1), /* SML Data */
/* High-Definition Audio */
PAD_CFG_NF(GPP_D10, NATIVE, DEEP, NF1), /* Clock */
PAD_CFG_NF(GPP_D11, NATIVE, DEEP, NF1), /* Sync */
PAD_CFG_NF(GPP_D12, NATIVE, DEEP, NF1), /* Data Output */
PAD_CFG_NF(GPP_D13, NATIVE, DEEP, NF1), /* Data Input */
PAD_CFG_NF(GPP_D17, NATIVE, DEEP, NF1), /* Reset */
/* V02: PCIE_WAKE_LAN */
PAD_NC(GPP_V02, NONE),
/* V06: GPD_6_SLP_A_N */
@ -449,22 +456,12 @@ const struct pad_config gpio_table[] = {
PAD_NC(GPP_D08, NONE),
/* D09: */
PAD_NC(GPP_D09, NONE),
/* D10: HDA_CODEC_BCLK */
PAD_CFG_NF(GPP_D10, NATIVE, DEEP, NF1),
/* D11: HDA_CODEC_SYNC */
PAD_CFG_NF(GPP_D11, NATIVE, DEEP, NF1),
/* D12: HDA_CODEC_SDO */
PAD_CFG_NF(GPP_D12, NATIVE, DEEP, NF1),
/* D13: HDA_CODEC_SDI */
PAD_CFG_NF(GPP_D13, NATIVE, DEEP, NF1),
/* D14: */
PAD_NC(GPP_D14, NONE),
/* D15: */
PAD_NC(GPP_D15, NONE),
/* D16: */
PAD_NC(GPP_D16, NONE),
/* D17: HDA_CODEC_RESET0_N */
PAD_CFG_NF(GPP_D17, NATIVE, DEEP, NF1),
/* D18: */
PAD_NC(GPP_D18, NONE),
/* D19: */

View file

@ -59,6 +59,13 @@ const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* SML Clock */
PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* SML Data */
/* High-Definition Audio */
PAD_CFG_NF(GPP_R0, NATIVE, DEEP, NF1), /* Clock */
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1), /* Sync */
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1), /* Data Output */
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1), /* Data Input */
PAD_CFG_NF(GPP_R4, NATIVE, DEEP, NF1), /* Reset */
/* GPD2: LAN Wake */
PAD_NC(GPD2, NONE),
/* GPD6: Sleep A */
@ -422,16 +429,6 @@ const struct pad_config gpio_table[] = {
/* T15: Not Connected */
PAD_NC(GPP_T15, NONE),
/* R0: HDA BCLK */
PAD_CFG_NF(GPP_R0, NATIVE, DEEP, NF1),
/* R1: HDA SYNC */
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1),
/* R2: HDA SDO */
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1),
/* R3: HDA SDI */
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),
/* R4: HDA Reset */
PAD_CFG_NF(GPP_R4, NATIVE, DEEP, NF1),
/* R5: MiPi Cam Reset */
PAD_NC(GPP_R5, NONE),
/* R6: Not Connected */

View file

@ -51,6 +51,13 @@ const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_C6, NONE, PWROK, NF1), /* SML Clock */
PAD_CFG_NF(GPP_C7, NONE, PWROK, NF1), /* SML Data */
/* High-Definition Audio */
PAD_CFG_NF(GPP_R0, NATIVE, DEEP, NF1), /* Clock */
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1), /* Sync */
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1), /* Data Output */
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1), /* Data Input */
PAD_NC(GPP_R4, NONE), /* Reset */
/* GPD2: LAN_WAKE# */
PAD_NC(GPD2, NONE),
/* GPD6: SIO_SLP_A# */
@ -346,16 +353,6 @@ const struct pad_config gpio_table[] = {
/* H23: Not Connected */
PAD_NC(GPP_H23, NONE),
/* R0: HDA_BCLK */
PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1),
/* R1: HDA_SYNC */
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1),
/* R2: HDA_SDO */
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1),
/* R3: HDA_SDI_0_SSP0_RXD */
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),
/* R4: Not Connected */
PAD_NC(GPP_R4, NONE),
/* R5: Not Connected */
PAD_NC(GPP_R5, NONE),
/* R6: Not Connected */

View file

@ -69,6 +69,13 @@ const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* SML Clock */
PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* SML Data */
/* High-Definition Audio */
PAD_CFG_NF(GPP_R0, NATIVE, DEEP, NF1), /* Clock */
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1), /* Sync */
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1), /* Data Output */
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1), /* Data Input */
PAD_CFG_NF(GPP_R4, NATIVE, DEEP, NF1), /* Reset */
/* GPD2: LAN Wake */
PAD_NC(GPD2, NONE),
/* GPD6: Sleep A */
@ -419,16 +426,6 @@ const struct pad_config gpio_table[] = {
/* T15: Not Connected */
PAD_NC(GPP_T15, NONE),
/* R0: HDA BCLK */
PAD_CFG_NF(GPP_R0, NATIVE, DEEP, NF1),
/* R1: HDA SYNC */
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1),
/* R2: HDA SDO */
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1),
/* R3: HDA SDI */
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),
/* R4: HDA Reset */
PAD_CFG_NF(GPP_R4, NATIVE, DEEP, NF1),
/* R5: MiPi Cam Reset */
PAD_NC(GPP_R5, NONE),
/* R6: Not Connected */

View file

@ -57,6 +57,13 @@ const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), /* TCP0 Hot Plug */
PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1), /* TCP0 Hot Plug */
/* High-Definition Audio */
PAD_CFG_NF(GPP_R0, NATIVE, DEEP, NF1), /* Clock */
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1), /* Sync */
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1), /* Data Output */
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1), /* Data Input */
PAD_CFG_NF(GPP_R4, NATIVE, DEEP, NF1), /* Reset */
/* GPD2: LAN Wake */
PAD_NC(GPD2, NONE),
/* GPD6: Sleep A */
@ -418,16 +425,6 @@ const struct pad_config gpio_table[] = {
/* T15: Not Connected */
PAD_NC(GPP_T15, NONE),
/* R0: HDA BCLK */
PAD_CFG_NF(GPP_R0, NATIVE, DEEP, NF1),
/* R1: HDA SYNC */
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1),
/* R2: HDA SDO */
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1),
/* R3: HDA SDI */
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),
/* R4: HDA Reset */
PAD_CFG_NF(GPP_R4, NATIVE, DEEP, NF1),
/* R5: Not Connected */
PAD_NC(GPP_R5, NONE),
/* R6: Not Connected */