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back out all changes made by me since r1163. They were basically all

Browse source 
coreboot-v2 only. This gets you guys a compiling v3 tree again. Sorry 
for the inconvenience.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>




git-svn-id: svn://coreboot.org/repository/coreboot-v3@1177 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Stefan Reinauer 2009-08-24 13:07:34 +00:00
commit 6dc8cc1b19
29 changed files with 924 additions and 925 deletions
Download patch file Download diff file Expand all files Collapse all files

5
util/x86emu/Config.lb
View file

@ -6,9 +6,8 @@ if CONFIG_PCI_OPTION_ROM_RUN_YABEL
dir x86emu
else
if CONFIG_PCI_OPTION_ROM_RUN_REALMODE
object x86.o
object x86_interrupts.o
object x86_asm.S
object vm86.o
object vm86_gdt.o
else
object biosemu.o
dir pcbios

4
util/x86emu/Makefile
View file

@ -37,7 +37,7 @@ X86EMU_INCLUDE += -I $(src)/util/x86emu
#TODO: remove these, these are .h files from slof, to make the merge easier...
X86EMU_INCLUDE += -I $(src)/util/x86emu/yabel/compat
endif
REALMODE_SRC = x86.c x86_asm.S
VM86_SRC = vm86.c vm86_gdt.c
ifeq ($(CONFIG_PCI_OPTION_ROM_RUN_X86EMU),y)
LIBX86EMU_SRC=$(patsubst %,x86emu/%,$(X86EMU_SRC)) $(BIOSEMU_SRC)
@ -48,7 +48,7 @@ LIBX86EMU_SRC=$(patsubst %,x86emu/%,$(X86EMU_SRC)) $(patsubst %,yabel/%,$(BIOSEM
endif
ifeq ($(CONFIG_PCI_OPTION_ROM_RUN_REALMODE),y)
LIBX86EMU_SRC=$(REALMODE_SRC)
LIBX86EMU_SRC=$(VM86_SRC)
endif
LIBX86EMU_OBJS = $(patsubst %.c,$(obj)/util/x86emu/%.o,$(LIBX86EMU_SRC))

17
util/x86emu/biosemu.c
View file

@ -36,7 +36,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifdef CONFIG_COREBOOT_V2
#ifdef COREBOOT_V2
#include <arch/io.h>
#include <console/console.h>
#else
@ -102,7 +102,7 @@ u8 x_inb(u16 port)
u8 val;
val = inb(port);
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (port != 0x40)
printk("inb(0x%04x) = 0x%02x\n", port, val);
#endif
@ -116,7 +116,7 @@ u16 x_inw(u16 port)
val = inw(port);
#ifdef CONFIG_DEBUG
#ifdef DEBUG
printk("inw(0x%04x) = 0x%04x\n", port, val);
#endif
return val;
@ -128,7 +128,7 @@ u32 x_inl(u16 port)
val = inl(port);
#ifdef CONFIG_DEBUG
#ifdef DEBUG
printk("inl(0x%04x) = 0x%08x\n", port, val);
#endif
return val;
@ -136,7 +136,7 @@ u32 x_inl(u16 port)
void x_outb(u16 port, u8 val)
{
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (port != 0x43)
printk("outb(0x%02x, 0x%04x)\n", val, port);
#endif
@ -145,7 +145,7 @@ void x_outb(u16 port, u8 val)
void x_outw(u16 port, u16 val)
{
#ifdef CONFIG_DEBUG
#ifdef DEBUG
printk("outw(0x%04x, 0x%04x)\n", val, port);
#endif
outw(val, port);
@ -153,7 +153,7 @@ void x_outw(u16 port, u16 val)
void x_outl(u16 port, u32 val)
{
#ifdef CONFIG_DEBUG
#ifdef DEBUG
printk("outl(0x%08x, 0x%04x)\n", val, port);
#endif
outl(val, port);
@ -213,7 +213,6 @@ void do_int(int num)
ret = run_bios_int(num);
}
#if 0
#define SYS_BIOS 0xf0000
/*
@ -387,7 +386,7 @@ void run_bios(struct device * dev, unsigned long addr)
pushw(X86_SS);
pushw(X86_SP + 2);
#ifdef CONFIG_DEBUG
#ifndef NO_TRACE
//X86EMU_trace_on();
#endif

2
util/x86emu/include/x86emu/fpu_regs.h
View file

@ -102,7 +102,7 @@ struct x86_fpu_registers {
#endif /* X86_FPU_SUPPORT */
#ifdef CONFIG_DEBUG
#ifdef DEBUG
# define DECODE_PRINTINSTR32(t,mod,rh,rl) \
DECODE_PRINTF(t[(mod<<3)+(rh)]);
# define DECODE_PRINTINSTR256(t,mod,rh,rl) \

2
util/x86emu/include/x86emu/regs.h
View file

@ -279,7 +279,7 @@ typedef struct {
u32 mode;
volatile int intr; /* mask of pending interrupts */
volatile int debug;
#ifdef CONFIG_DEBUG
#ifdef DEBUG
int check;
u16 saved_ip;
u16 saved_cs;

2
util/x86emu/include/x86emu/x86emu.h
View file

@ -163,7 +163,7 @@ void X86EMU_prepareForInt(int num);
void X86EMU_exec(void);
void X86EMU_halt_sys(void);
#ifdef CONFIG_DEBUG
#ifdef DEBUG
#define HALT_SYS() \
printk("halt_sys: file %s, line %d\n", __FILE__, __LINE__); \
X86EMU_halt_sys();

4
util/x86emu/pcbios/pcibios.c
View file

@ -35,7 +35,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifdef CONFIG_COREBOOT_V2
#ifdef COREBOOT_V2
#include <console/console.h>
#else
#include <console.h>
@ -65,7 +65,7 @@ int pcibios_handler(void)
break;
case FIND_PCI_DEVICE:
/* FixME: support SI != 0 */
#ifdef CONFIG_COREBOOT_V2
#ifdef COREBOOT_V2
dev = dev_find_device(X86_DX, X86_CX, dev);
#else
dev = dev_find_pci_device(X86_DX, X86_CX, dev);

719
util/x86emu/vm86.c Normal file
View file

@ -0,0 +1,719 @@
/*
* Erik Arjan Hendriks <hendriks@lanl.gov>
* Copyright (C) 2000 Scyld.
* Copyright (C) 2000 Scyld Computing Corporation
* Copyright (C) 2001 University of California. LA-CC Number 01-67.
* Copyright (C) 2005 Nick.Barker9@btinternet.com
* Copyright (C) 2007-2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*
*/
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <string.h>
#ifdef COREBOOT_V2
#include <console/console.h>
#include <arch/io.h>
#define printk(lvl, x...) printk_debug(x)
#else
#include <console.h>
#include <io.h>
#endif
/* The address arguments to this function are PHYSICAL ADDRESSES */
static void real_mode_switch_call_vga(unsigned long devfn)
{
__asm__ __volatile__ (
/* paranoia -- does ecx get saved? not sure.
* This is the easiest safe thing to do.
*/
" pushal \n"
/* save the stack */
" mov %esp, __stack \n"
" jmp 1f \n"
"__stack: .long 0 \n"
"1:\n"
/* get devfn into %ecx */
" movl %esp, %ebp \n"
// FIXME: why is this 8?
" movl 8(%ebp), %ecx \n"
/* load 'our' gdt */
" lgdt %cs:__mygdtaddr \n"
/* This configures CS properly for real mode. */
" ljmp $0x28, $__rms_16bit\n"
"__rms_16bit: \n"
" .code16 \n"
/* 16 bit code from here on... */
/* Load the segment registers w/ properly configured
* segment descriptors. They will retain these
* configurations (limits, writability, etc.) once
* protected mode is turned off.
*/
" mov $0x30, %ax \n"
" mov %ax, %ds \n"
" mov %ax, %es \n"
" mov %ax, %fs \n"
" mov %ax, %gs \n"
" mov %ax, %ss \n"
/* Turn off protection (bit 0 in CR0) */
" movl %cr0, %eax \n"
" andl $0xFFFFFFFE, %eax \n"
" movl %eax, %cr0 \n"
/* Now really going into real mode */
" ljmp $0, $__rms_real\n"
"__rms_real: \n"
/* Setup a stack: Put the stack at the end of page zero.
* That way we can easily share it between real and
* protected, since the 16-bit ESP at segment 0 will
* work for any case. */
" mov $0x0, %ax \n"
" mov %ax, %ss \n"
" movl $0x1000, %eax \n"
" movl %eax, %esp \n"
/* Load our 16 it idt */
" xor %ax, %ax \n"
" mov %ax, %ds \n"
" lidt __myidt \n"
/* Dump zeros in the other segment registers */
" mov %ax, %es \n"
" mov %ax, %fs \n"
" mov %ax, %gs \n"
" mov $0x40, %ax \n"
" mov %ax, %ds \n"
" mov %cx, %ax \n"
/* run VGA BIOS at 0xc000:0003 */
" lcall $0xc000, $0x0003\n"
/* If we got here, just about done.
* Need to get back to protected mode
*/
" movl %cr0, %eax \n"
" orl $0x0000001, %eax\n" /* PE = 1 */
" movl %eax, %cr0 \n"
/* Now that we are in protected mode
* jump to a 32 bit code segment.
*/
" data32 ljmp $0x10, $vgarestart\n"
"vgarestart:\n"
" .code32\n"
" movw $0x18, %ax \n"
" mov %ax, %ds \n"
" mov %ax, %es \n"
" mov %ax, %fs \n"
" mov %ax, %gs \n"
" mov %ax, %ss \n"
/* restore proper gdt and idt */
" lgdt %cs:gdtarg \n"
" lidt idtarg \n"
".globl vga_exit \n"
"vga_exit: \n"
" mov __stack, %esp \n"
" popal \n"
);
}
// FIXME: drop this
// __asm__ (".text\n""real_mode_switch_end:\n");
// extern char real_mode_switch_end[];
/* call vga bios int 10 function 0x4f14 to enable main console
epia-m does not always autosence the main console so forcing it on is good !! */
void vga_enable_console(void)
{
__asm__ __volatile__ (
/* paranoia -- does ecx get saved? not sure. This is
* the easiest safe thing to do. */
" pushal \n"
/* save the stack */
" mov %esp, __stack \n"
/* load 'our' gdt */
" lgdt %cs:__mygdtaddr \n"
/* This configures CS properly for real mode. */
" ljmp $0x28, $__vga_ec_16bit\n"
"__vga_ec_16bit: \n"
" .code16 \n"
/* 16 bit code from here on... */
/* Load the segment registers w/ properly configured segment
* descriptors. They will retain these configurations (limits,
* writability, etc.) once protected mode is turned off. */
" mov $0x30, %ax \n"
" mov %ax, %ds \n"
" mov %ax, %es \n"
" mov %ax, %fs \n"
" mov %ax, %gs \n"
" mov %ax, %ss \n"
/* Turn off protection (bit 0 in CR0) */
" movl %cr0, %eax \n"
" andl $0xFFFFFFFE, %eax\n"
" movl %eax, %cr0 \n"
/* Now really going into real mode */
" ljmp $0, $__vga_ec_real \n"
"__vga_ec_real: \n"
/* put the stack at the end of page zero.
* that way we can easily share it between real and protected,
* since the 16-bit ESP at segment 0 will work for any case. */
/* Setup a stack */
" mov $0x0, %ax \n"
" mov %ax, %ss \n"
" movl $0x1000, %eax \n"
" movl %eax, %esp \n"
/* debugging for RGM */
" mov $0x11, %al \n"
" outb %al, $0x80 \n"
/* Load our 16 it idt */
" xor %ax, %ax \n"
" mov %ax, %ds \n"
" lidt __myidt \n"
/* Dump zeros in the other segregs */
" mov %ax, %ds \n"
" mov %ax, %es \n"
" mov %ax, %fs \n"
" mov %ax, %gs \n"
/* ask bios to enable main console */
/* set up for int 10 call - values found from X server
* bios call routines */
" movw $0x4f14,%ax \n"
" movw $0x8003,%bx \n"
" movw $1, %cx \n"
" movw $0, %dx \n"
" movw $0, %di \n"
" int $0x10 \n"
" movb $0x55, %al \n"
" outb %al, $0x80 \n"
/* if we got here, just about done.
* Need to get back to protected mode */
" movl %cr0, %eax \n"
" orl $0x0000001, %eax\n" /* PE = 1 */
" movl %eax, %cr0 \n"
/* Now that we are in protected mode jump to a 32 bit code segment. */
" data32 ljmp $0x10, $vga_ec_restart\n"
"vga_ec_restart:\n"
" .code32\n"
" movw $0x18, %ax \n"
" mov %ax, %ds \n"
" mov %ax, %es \n"
" mov %ax, %fs \n"
" mov %ax, %gs \n"
" mov %ax, %ss \n"
/* restore proper gdt and idt */
" lgdt %cs:gdtarg \n"
" lidt idtarg \n"
" .globl vga__ec_exit \n"
"vga_ec_exit:\n"
" mov __stack, %esp \n"
" popal\n"
);
}
// we had hoped to avoid this.
// this is a stub IDT only. It's main purpose is to ignore calls
// to the BIOS.
// no longer. Dammit. We have to respond to these.
struct realidt {
unsigned short offset, cs;
};
// from a handy writeup that andrey found.
// handler.
// There are some assumptions we can make here.
// First, the Top Of Stack (TOS) is located on the top of page zero.
// we can share this stack between real and protected mode.
// that simplifies a lot of things ...
// we'll just push all the registers on the stack as longwords,
// and pop to protected mode.
// second, since this only ever runs as part of coreboot,
// we know all the segment register values -- so we don't save any.
// keep the handler that calls things small. It can do a call to
// more complex code in coreboot itself. This helps a lot as we don't
// have to do address fixup in this little stub, and calls are absolute
// so the handler is relocatable.
void handler(void)
{
__asm__ __volatile__ (
" .code16 \n"
"idthandle: \n"
" pushal \n"
" movb $0, %al \n"
" ljmp $0, $callbiosint16\n"
"end_idthandle: \n"
" .code32 \n"
);
}
void debughandler(void)
{
__asm__ __volatile__ (
" .code16 \n"
"debughandle: \n"
" pushw %cx \n"
" movw $250, %cx \n"
"dbh1: \n"
" loop dbh1 \n"
" popw %cx \n"
" iret \n"
"end_debughandle: \n"
".code32 \n"
);
}
// Calling conventions. The first C function is called with this stuff
// on the stack. They look like value parameters, but note that if you
// modify them they will go back to the INTx function modified.
// the C function will call the biosint function with these as
// REFERENCE parameters. In this way, we can easily get
// returns back to the INTx caller (i.e. vgabios)
void callbiosint(void)
{
__asm__ __volatile__ (
" .code16 \n"
"callbiosint16: \n"
" push %ds \n"
" push %es \n"
" push %fs \n"
" push %gs \n"
// clean up the int #. To save space we put it in the lower
// byte. But the top 24 bits are junk.
" andl $0xff, %eax\n"
// this push does two things:
// - put the INT # on the stack as a parameter
// - provides us with a temp for the %cr0 mods.
" pushl %eax \n"
" movl %cr0, %eax\n"
" orl $0x00000001, %eax\n" /* PE = 1 */
" movl %eax, %cr0\n"
/* Now that we are in protected mode jump to a 32 bit code segment. */
" data32 ljmp $0x10, $biosprotect\n"
"biosprotect: \n"
" .code32 \n"
" movw $0x18, %ax \n"
" mov %ax, %ds \n"
" mov %ax, %es \n"
" mov %ax, %fs \n"
" mov %ax, %gs \n"
" mov %ax, %ss \n"
" lidt idtarg \n"
" call biosint \n"
// back to real mode ...
" ljmp $0x28, $__rms_16bit2\n"
"__rms_16bit2: \n"
" .code16 \n"
/* 16 bit code from here on... */
/* Load the segment registers w/ properly configured segment
* descriptors. They will retain these configurations (limits,
* writability, etc.) once protected mode is turned off. */
" mov $0x30, %ax \n"
" mov %ax, %ds \n"
" mov %ax, %es \n"
" mov %ax, %fs \n"
" mov %ax, %gs \n"
" mov %ax, %ss \n"
/* Turn off protection (bit 0 in CR0) */
" movl %cr0, %eax \n"
" andl $0xFFFFFFFE, %eax \n"
" movl %eax, %cr0 \n"
/* Now really going into real mode */
" ljmp $0, $__rms_real2 \n"
"__rms_real2: \n"
/* Setup a stack
* FixME: where is esp? */
" mov $0x0, %ax \n"
" mov %ax, %ss \n"
/* ebugging for RGM */
" mov $0x11, %al \n"
" outb %al, $0x80 \n"
/* Load our 16 it idt */
" xor %ax, %ax \n"
" mov %ax, %ds \n"
" lidt __myidt \n"
/* Dump zeros in the other segregs */
" mov %ax, %es \n"
" mov %ax, %fs \n"
" mov %ax, %gs \n"
" mov $0x40, %ax \n"
" mov %ax, %ds \n"
/* pop the INT # that you pushed earlier */
" popl %eax \n"
" pop %gs \n"
" pop %fs \n"
" pop %es \n"
" pop %ds \n"
" popal \n"
" iret \n"
" .code32 \n"
);
}
enum {
PCIBIOS = 0x1a,
MEMSIZE = 0x12
};
int pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp,
unsigned long *pesp, unsigned long *pebx, unsigned long *pedx,
unsigned long *pecx, unsigned long *peax, unsigned long *pflags);
int handleint21(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp,
unsigned long *pesp, unsigned long *pebx, unsigned long *pedx,
unsigned long *pecx, unsigned long *peax, unsigned long *pflags
);
extern void vga_exit(void);
int __attribute__((regparm(0))) biosint(unsigned long intnumber,
unsigned long gsfs, unsigned long dses,
unsigned long edi, unsigned long esi,
unsigned long ebp, unsigned long esp,
unsigned long ebx, unsigned long edx,
unsigned long ecx, unsigned long eax,
unsigned long cs_ip, unsigned short stackflags)
{
unsigned long ip;
unsigned long cs;
unsigned long flags;
int ret = -1;
ip = cs_ip & 0xffff;
cs = cs_ip >> 16;
flags = stackflags;
printk(BIOS_DEBUG, "biosint: INT# 0x%lx\n", intnumber);
printk(BIOS_DEBUG, "biosint: eax 0x%lx ebx 0x%lx ecx 0x%lx edx 0x%lx\n",
eax, ebx, ecx, edx);
printk(BIOS_DEBUG, "biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n",
ebp, esp, edi, esi);
printk(BIOS_DEBUG, "biosint: ip 0x%lx cs 0x%lx flags 0x%lx\n",
ip, cs, flags);
// cases in a good compiler are just as good as your own tables.
switch (intnumber) {
case 0 ... 15:
// These are not BIOS service, but the CPU-generated exceptions
printk(BIOS_INFO, "biosint: Oops, exception %lu\n", intnumber);
if (esp < 0x1000) {
printk(BIOS_DEBUG, "Stack contents: ");
while (esp < 0x1000) {
printk(BIOS_DEBUG, "0x%04x ", *(unsigned short *) esp);
esp += 2;
}
printk(BIOS_DEBUG, "\n");
}
printk(BIOS_DEBUG, "biosint: Bailing out\n");
// "longjmp"
vga_exit();
break;
case PCIBIOS:
ret = pcibios( &edi, &esi, &ebp, &esp,
&ebx, &edx, &ecx, &eax, &flags);
break;
case MEMSIZE:
// who cares.
eax = 64 * 1024;
ret = 0;
break;
case 0x15:
ret=handleint21( &edi, &esi, &ebp, &esp,
&ebx, &edx, &ecx, &eax, &flags);
break;
default:
printk(BIOS_INFO, "BIOSINT: Unsupport int #0x%lx\n",
intnumber);
break;
}
if (ret)
flags |= 1; // carry flags
else
flags &= ~1;
stackflags = flags;
return ret;
}
void setup_realmode_idt(void)
{
extern unsigned char idthandle, end_idthandle;
#if 0
extern unsigned char debughandle, end_debughandle;
#endif
int i;
struct realidt *idts = (struct realidt *) 0;
int codesize = &end_idthandle - &idthandle;
unsigned char *intbyte, *codeptr;
// for each int, we create a customized little handler
// that just pushes %ax, puts the int # in %al,
// then calls the common interrupt handler.
// this necessitated because intel didn't know much about
// architecture when they did the 8086 (it shows)
// (hmm do they know anymore even now :-)
// obviously you can see I don't really care about memory
// efficiency. If I did I would probe back through the stack
// and get it that way. But that's really disgusting.
for (i = 0; i < 256; i++) {
idts[i].cs = 0;
codeptr = (unsigned char *) 4096 + i * codesize;
idts[i].offset = (unsigned) codeptr;
memcpy(codeptr, &idthandle, codesize);
intbyte = codeptr + 3;
*intbyte = i;
}
// fixed entry points
// VGA BIOSes tend to hardcode f000:f065 as the previous handler of
// int10.
// calling convention here is the same as INTs, we can reuse
// the int entry code.
codeptr = (unsigned char *) 0xff065;
memcpy(codeptr, &idthandle, codesize);
intbyte = codeptr + 3;
*intbyte = 0x42; /* int42 is the relocated int10 */
/* The source of the following code is not yet known.
* We feel it may be useful someday, but right now it
* scribbles over code space. We are leaving it here as a
* "Living comment" since it may at some point be needed
* again. It is a very intriguing idea -- one could run
* vm86 code with TF set and set programmable times
* between instructions to slow them down. For those who
* recall the "turbo" switch on old PCs, this is the
* software equivalent.
*/
#if 0
/* debug handler - useful to set a programmable delay between instructions if the
TF bit is set upon call to real mode */
idts[1].cs = 0;
idts[1].offset = 16384;
memcpy((void *)16384, &debughandle, &end_debughandle - &debughandle);
#endif
}
void run_bios(struct device *dev, unsigned long addr)
{
int i;
/* clear vga bios data area */
for (i = 0x400; i < 0x500; i++) {
*(unsigned char *) i = 0;
}
setup_realmode_idt();
real_mode_switch_call_vga((dev->bus->secondary << 8) | dev->path.pci.devfn);
}
enum {
CHECK = 0xb001,
FINDDEV = 0xb102,
READCONFBYTE = 0xb108,
READCONFWORD = 0xb109,
READCONFDWORD = 0xb10a,
WRITECONFBYTE = 0xb10b,
WRITECONFWORD = 0xb10c,
WRITECONFDWORD = 0xb10d
};
// errors go in AH. Just set these up so that word assigns
// will work. KISS.
enum {
PCIBIOS_NODEV = 0x8600,
PCIBIOS_BADREG = 0x8700
};
int
pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp,
unsigned long *pesp, unsigned long *pebx, unsigned long *pedx,
unsigned long *pecx, unsigned long *peax, unsigned long *pflags)
{
unsigned short func = (unsigned short) *peax;
int retval = 0;
unsigned short devid, vendorid, devfn;
/* Use short to get rid of gabage in upper half of 32-bit register */
short devindex;
unsigned char bus;
struct device *dev;
switch(func) {
case CHECK:
*pedx = 0x4350;
*pecx = 0x2049;
retval = 0;
break;
case FINDDEV:
{
devid = *pecx;
vendorid = *pedx;
devindex = *pesi;
dev = 0;
#ifdef COREBOOT_V2
while ((dev = dev_find_device(vendorid, devid, dev))) {
#else
while ((dev = dev_find_pci_device(vendorid, devid, dev))) {
#endif
if (devindex <= 0)
break;
devindex--;
}
if (dev) {
unsigned short busdevfn;
*peax = 0;
// busnum is an unsigned char;
// devfn is an int, so we mask it off.
busdevfn = (dev->bus->secondary << 8)
| (dev->path.pci.devfn & 0xff);
printk(BIOS_DEBUG, "0x%x: return 0x%x\n", func, busdevfn);
*pebx = busdevfn;
retval = 0;
} else {
*peax = PCIBIOS_NODEV;
retval = -1;
}
}
break;
case READCONFDWORD:
case READCONFWORD:
case READCONFBYTE:
case WRITECONFDWORD:
case WRITECONFWORD:
case WRITECONFBYTE:
{
unsigned long dword;
unsigned short word;
unsigned char byte;
unsigned char reg;
devfn = *pebx & 0xff;
bus = *pebx >> 8;
reg = *pedi;
dev = dev_find_slot(bus, devfn);
if (! dev) {
printk(BIOS_DEBUG, "0x%x: BAD DEVICE bus %d devfn 0x%x\n", func, bus, devfn);
// idiots. the pcibios guys assumed you'd never pass a bad bus/devfn!
*peax = PCIBIOS_BADREG;
retval = -1;
}
switch(func) {
case READCONFBYTE:
byte = pci_read_config8(dev, reg);
*pecx = byte;
break;
case READCONFWORD:
word = pci_read_config16(dev, reg);
*pecx = word;
break;
case READCONFDWORD:
dword = pci_read_config32(dev, reg);
*pecx = dword;
break;
case WRITECONFBYTE:
byte = *pecx;
pci_write_config8(dev, reg, byte);
break;
case WRITECONFWORD:
word = *pecx;
pci_write_config16(dev, reg, word);
break;
case WRITECONFDWORD:
dword = *pecx;
pci_write_config32(dev, reg, dword);
break;
}
if (retval)
retval = PCIBIOS_BADREG;
printk(BIOS_DEBUG, "0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n",
func, bus, devfn, reg, *pecx);
*peax = 0;
retval = 0;
}
break;
default:
printk(BIOS_ERR, "UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func);
break;
}
return retval;
}
int handleint21(unsigned long *edi, unsigned long *esi, unsigned long *ebp,
unsigned long *esp, unsigned long *ebx, unsigned long *edx,
unsigned long *ecx, unsigned long *eax, unsigned long *flags)
{
int res=-1;
switch(*eax&0xffff)
{
case 0x5f19:
break;
case 0x5f18:
*eax=0x5f;
*ebx=0x545; // MCLK = 133, 32M frame buffer, 256 M main memory
*ecx=0x060;
res=0;
break;
case 0x5f00:
*eax = 0x8600;
break;
case 0x5f01:
*eax = 0x5f;
*ecx = (*ecx & 0xffffff00 ) | 2; // panel type = 2 = 1024 * 768
res = 0;
break;
case 0x5f02:
*eax=0x5f;
*ebx= (*ebx & 0xffff0000) | 2;
*ecx= (*ecx & 0xffff0000) | 0x401; // PAL + crt only
*edx= (*edx & 0xffff0000) | 0; // TV Layout - default
res=0;
break;
case 0x5f0f:
*eax=0x860f;
break;
}
return res;
}

101
util/x86emu/vm86_gdt.c Normal file
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@ -0,0 +1,101 @@
/*
* Erik Arjan Hendriks <hendriks@lanl.gov>
* Copyright (C) 2000 Scyld.
* Copyright (C) 2000 Scyld Computing Corporation
* Copyright (C) 2001 University of California. LA-CC Number 01-67.
* Copyright (C) 2005 Nick.Barker9@btinternet.com
* Copyright (C) 2007 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*
*/
/* Declare a temporary global descriptor table -
* necessary because the core part of the bios
* no longer sets up any 16 bit segments
*/
__asm__ (
/* pointer to original gdt */
" .globl gdtarg\n"
"gdtarg: \n"
" .word gdt_limit \n"
#ifdef COREBOOT_V2
" .long gdt \n"
#else
" .long gdtptr \n"
#endif
/* compute the table limit */
"__mygdt_limit = __mygdt_end - __mygdt - 1 \n"
" .globl __mygdtaddr\n"
"__mygdtaddr: \n"
" .word __mygdt_limit \n"
" .long __mygdt \n"
" .globl __mygdt\n"
"__mygdt: \n"
/* selgdt 0, unused */
" .word 0x0000, 0x0000 \n"
" .byte 0x00, 0x00, 0x00, 0x00 \n"
/* selgdt 8, unused */
" .word 0x0000, 0x0000 \n"
" .byte 0x00, 0x00, 0x00, 0x00 \n"
/* selgdt 0x10, flat code segment */
" .word 0xffff, 0x0000 \n"
" .byte 0x00, 0x9b, 0xcf, 0x00 \n"
/* selgdt 0x18, flat data segment */
" .word 0xffff, 0x0000 \n"
" .byte 0x00, 0x93, 0xcf, 0x00 \n"
/* selgdt 0x20, unused */
" .word 0x0000, 0x0000 \n"
" .byte 0x00, 0x00, 0x00, 0x00 \n"
/* selgdt 0x28 16-bit 64k code at 0x00000000 */
" .word 0xffff, 0x0000 \n"
" .byte 0, 0x9a, 0, 0 \n"
/* selgdt 0x30 16-bit 64k data at 0x00000000 */
" .word 0xffff, 0x0000 \n"
" .byte 0, 0x92, 0, 0 \n"
"__mygdt_end: \n"
#ifndef COREBOOT_V2
/* FIXME: This does probably not belong here */
" .globl idtarg\n"
"idtarg:\n"
" .word _idt_end - _idt - 1\n" /* limit */
" .long _idt\n"
" .word 0\n"
"_idt:\n"
" .fill 20, 8, 0\n" // # idt is unitiailzed
"_idt_end:\n"
#endif
/* Declare a pointer to where our idt is going to be i.e. at mem zero */
" .globl __myidt\n"
"__myidt: \n"
/* 16-bit limit */
" .word 1023 \n"
/* 24-bit base */
" .long 0 \n"
" .word 0 \n"
);

230
util/x86emu/x86.c
View file

@ -1,230 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#include <device/pci.h>
#include <string.h>
#ifdef CONFIG_COREBOOT_V2
#include <arch/io.h>
#include <console/console.h>
#define printk(x...) do_printk(x)
#else
#include <console.h>
#endif
#define REALMODE_BASE ((void *)0x500)
struct realmode_idt {
u16 offset, cs;
};
struct eregs {
uint32_t eax, ecx, edx, ebx, esp, ebp, esi, edi;
uint32_t vector;
uint32_t error_code;
uint32_t eip;
uint32_t cs;
uint32_t eflags;
};
void x86_exception(struct eregs *info);
extern unsigned char __idt_handler, __idt_handler_size;
extern unsigned char __realmode_code, __realmode_code_size;
extern unsigned char __run_optionrom, __run_interrupt;
void (*run_optionrom)(u32 devfn) = (void *)&__run_optionrom;
void (*vga_enable_console)(void) = (void *)&__run_interrupt;
int (*intXX_handler[256])(struct eregs *regs) = { NULL };
static int intXX_exception_handler(struct eregs *regs)
{
printk(BIOS_INFO, "Oops, exception %d while executing option rom\n",
regs->vector);
x86_exception(regs); // Call coreboot exception handler
return 0; // Never returns?
}
static int intXX_unknown_handler(struct eregs *regs)
{
printk(BIOS_INFO, "Unsupported software interrupt #0x%x\n",
regs->vector);
return -1;
}
int int12_handler(struct eregs *regs);
int int15_handler(struct eregs *regs);
int int1a_handler(struct eregs *regs);
static void setup_interrupt_handlers(void)
{
int i;
/* The first 16 intXX functions are not BIOS services,
* but the CPU-generated exceptions ("hardware interrupts")
*/
for (i = 0; i < 0x10; i++)
intXX_handler[i] = &intXX_exception_handler;
/* Mark all other intXX calls as unknown first */
for (i = 0x10; i < 0x100; i++)
intXX_handler[i] = &intXX_unknown_handler;
/* Now set the default functions that are actually
* needed to initialize the option roms. This is very
* slick, as it allows us to implement mainboard specific
* interrupt handlers, such as the int15
*/
intXX_handler[0x12] = &int12_handler;
intXX_handler[0x15] = &int15_handler;
intXX_handler[0x1a] = &int1a_handler;
}
static void write_idt_stub(void *target, u8 intnum)
{
unsigned char *codeptr;
codeptr = (unsigned char *) target;
memcpy(codeptr, &__idt_handler, (size_t)&__idt_handler_size);
codeptr[3] = intnum; /* modify int# in the code stub. */
}
static void setup_realmode_idt(void)
{
struct realmode_idt *idts = (struct realmode_idt *) 0;
int i;
/* Copy IDT stub code for each interrupt. This might seem wasteful
* but it is really simple
*/
for (i = 0; i < 256; i++) {
idts[i].cs = 0;
idts[i].offset = 0x1000 + (i * (u32)&__idt_handler_size);
write_idt_stub((void *)((u32 )idts[i].offset), i);
}
/* Many option ROMs use the hard coded interrupt entry points in the
* system bios. So install them at the known locations.
* Only need int10 so far.
*/
/* int42 is the relocated int10 */
write_idt_stub((void *)0xff065, 0x42);
}
void run_bios(struct device *dev, unsigned long addr)
{
int i;
/* clear vga bios data area */
for (i = 0x400; i < 0x500; i++) {
*(unsigned char *) i = 0;
}
/* Set up C interrupt handlers */
setup_interrupt_handlers();
/* Setting up realmode IDT */
setup_realmode_idt();
memcpy(REALMODE_BASE, &__realmode_code, (size_t)&__realmode_code_size);
printk(BIOS_SPEW, "Real mode stub @%p: %d bytes\n", REALMODE_BASE,
(u32)&__realmode_code_size);
printk(BIOS_DEBUG, "Calling Option ROM...\n");
run_optionrom((dev->bus->secondary << 8) | dev->path.pci.devfn);
printk(BIOS_DEBUG, "... Option ROM returned.\n");
}
int __attribute__((regparm(0))) interrupt_handler(u32 intnumber,
u32 gsfs, u32 dses,
u32 edi, u32 esi,
u32 ebp, u32 esp,
u32 ebx, u32 edx,
u32 ecx, u32 eax,
u32 cs_ip, u16 stackflags)
{
u32 ip;
u32 cs;
u32 flags;
int ret = -1;
struct eregs reg_info;
ip = cs_ip & 0xffff;
cs = cs_ip >> 16;
flags = stackflags;
printk(BIOS_DEBUG, "oprom: INT# 0x%x\n", intnumber);
printk(BIOS_DEBUG, "oprom: eax: %08x ebx: %08x ecx: %08x edx: %08x\n",
eax, ebx, ecx, edx);
printk(BIOS_DEBUG, "oprom: ebp: %08x esp: %08x edi: %08x esi: %08x\n",
ebp, esp, edi, esi);
printk(BIOS_DEBUG, "oprom: ip: %04x cs: %04x flags: %08x\n",
ip, cs, flags);
// Fetch arguments from the stack and put them into
// a structure that we want to pass on to our sub interrupt
// handlers.
reg_info = (struct eregs) {
.eax=eax,
.ecx=ecx,
.edx=edx,
.ebx=ebx,
.esp=esp,
.ebp=ebp,
.esi=esi,
.edi=edi,
.vector=intnumber,
.error_code=0, // ??
.eip=ip,
.cs=cs,
.eflags=flags // ??
};
// Call the interrupt handler for this int#
ret = intXX_handler[intnumber](&reg_info);
// Put registers back on the stack. The assembler code
// will later pop them.
// What happens here is that we force (volatile!) changing
// the values of the parameters of this function. We do this
// because we know that they stay alive on the stack after
// we leave this function. Don't say this is bollocks.
*(volatile u32 *)&eax = reg_info.eax;
*(volatile u32 *)&ecx = reg_info.ecx;
*(volatile u32 *)&edx = reg_info.edx;
*(volatile u32 *)&ebx = reg_info.ebx;
*(volatile u32 *)&esi = reg_info.esi;
*(volatile u32 *)&edi = reg_info.edi;
flags = reg_info.eflags;
/* Pass errors back to our caller via the CARRY flag */
if (ret) {
printk(BIOS_DEBUG,"error!\n");
flags |= 1; // error: set carry
}else{
flags &= ~1; // no error: clear carry
}
*(volatile u16 *)&stackflags = flags;
return ret;
}

345
util/x86emu/x86_asm.S
View file

@ -1,345 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#define REALMODE_BASE 0x500
#define RELOCATED(x) (x - __realmode_code + REALMODE_BASE)
/* CR0 bits */
#define PE (1 << 0)
/* This is the intXX interrupt handler stub code. It gets copied
* to the IDT and to some fixed addresses in the F segment. Before
* the code can used, it gets patched up by the C function copying
* it: byte 3 (the $0 in movb $0, %al) is overwritten with the int#.
*/
.code16
.globl __idt_handler
__idt_handler:
pushal
movb $0, %al /* This instruction gets modified */
ljmp $0, $__interrupt_handler_16bit
.globl __idt_handler_size
__idt_handler_size = ( . - __idt_handler)
/* In order to be independent of coreboot's position in RAM
* we relocate a part of the code to the low megabyte, so the
* CPU can use it in real-mode. This code lives at __realmode_code.
*/
.globl __realmode_code
__realmode_code:
/* Realmode IDT pointer structure. */
.globl __realmode_idt
__realmode_idt = RELOCATED(.)
.word 1023 /* 16-bit limit */
.long 0 /* 24-bit base */
.word 0
/* Preserve old stack */
__stack = RELOCATED(.)
.long 0
.code32
.globl __run_optionrom
__run_optionrom = RELOCATED(.)
/* save all registers to the stack */
pushal
/* Move the protected mode stack to a safe place */
mov %esp, __stack
/* Get devfn into %ecx */
movl %esp, %ebp
// FIXME: Should this function be called with regparm=0?
movl 8(%ebp), %ecx
/* Activate the right segment descriptor real mode. */
ljmp $0x28, $RELOCATED(1f)
1:
.code16
/* 16 bit code from here on... */
/* Load the segment registers w/ properly configured
* segment descriptors. They will retain these
* configurations (limits, writability, etc.) once
* protected mode is turned off.
*/
mov $0x30, %ax
mov %ax, %ds
mov %ax, %es
mov %ax, %fs
mov %ax, %gs
mov %ax, %ss
/* Turn off protection */
movl %cr0, %eax
andl $~PE, %eax
movl %eax, %cr0
/* Now really going into real mode */
ljmp $0, $RELOCATED(1f)
1:
/* Setup a stack: Put the stack at the end of page zero.
* That way we can easily share it between real and
* protected, since the 16-bit ESP at segment 0 will
* work for any case. */
mov $0x0, %ax
mov %ax, %ss
movl $0x1000, %eax
movl %eax, %esp
/* Load our 16 bit idt */
xor %ax, %ax
mov %ax, %ds
lidt __realmode_idt
/* Set all segments to 0x0000, ds to 0x0040 */
mov %ax, %es
mov %ax, %fs
mov %ax, %gs
mov $0x40, %ax
mov %ax, %ds
mov %cx, %ax // restore ax
/* ************************************ */
// TODO this will not work for non-VGA option ROMs
/* run VGA BIOS at 0xc000:0003 */
lcall $0xc000, $0x0003
/* ************************************ */
/* If we got here, just about done.
* Need to get back to protected mode
*/
movl %cr0, %eax
orl $PE, %eax
movl %eax, %cr0
/* Now that we are in protected mode
* jump to a 32 bit code segment.
*/
data32 ljmp $0x10, $RELOCATED(1f)
1:
.code32
movw $0x18, %ax
mov %ax, %ds
mov %ax, %es
mov %ax, %fs
mov %ax, %gs
mov %ax, %ss
/* restore proper idt */
lidt idtarg
/* and exit */
mov __stack, %esp
popal
ret
.globl __run_interrupt
__run_interrupt = RELOCATED(.)
/* paranoia -- does ecx get saved? not sure. This is
* the easiest safe thing to do. */
pushal
/* save the stack */
mov %esp, __stack
/* This configures CS properly for real mode. */
ljmp $0x28, $RELOCATED(1f)
1:
.code16 /* 16 bit code from here on... */
// CONFIG_DEBUG
movb $0xec, %al
outb %al, $0x80
/* Load the segment registers w/ properly configured segment
* descriptors. They will retain these configurations (limits,
* writability, etc.) once protected mode is turned off.
*/
mov $0x30, %ax
mov %ax, %ds
mov %ax, %es
mov %ax, %fs
mov %ax, %gs
mov %ax, %ss
/* Turn off protected mode */
movl %cr0, %eax
andl $~PE, %eax
movl %eax, %cr0
/* Now really going into real mode */
data32 ljmp $0, $RELOCATED(1f)
1:
/* put the stack at the end of page zero.
* that way we can easily share it between real and protected,
* since the 16-bit ESP at segment 0 will work for any case.
*/
/* setup a stack */
mov $0x0, %ax
mov %ax, %ss
movl $0x1000, %eax
movl %eax, %esp
/* Load 16-bit intXX IDT */
xor %ax, %ax
mov %ax, %ds
lidt __realmode_idt
/* Set all segments to 0x0000 */
mov %ax, %ds
mov %ax, %es
mov %ax, %fs
mov %ax, %gs
/* Call VGA BIOS int10 function 0x4f14 to enable main console
* Epia-M does not always autosence the main console so forcing
* it on is good.
*/
/* Ask VGA option rom to enable main console */
movw $0x4f14,%ax
movw $0x8003,%bx
movw $1, %cx
movw $0, %dx
movw $0, %di
int $0x10
/* Ok, the job is done, now go back to protected mode coreboot */
movl %cr0, %eax
orl $PE, %eax
movl %eax, %cr0
/* Now that we are in protected mode jump to a 32-bit code segment. */
data32 ljmp $0x10, $RELOCATED(1f)
1:
.code32
movw $0x18, %ax
mov %ax, %ds
mov %ax, %es
mov %ax, %fs
mov %ax, %gs
mov %ax, %ss
/* restore coreboot's 32-bit IDT */
lidt idtarg
/* Exit */
mov __stack, %esp
popal
ret
/* This is the 16-bit interrupt entry point called by the IDT stub code.
* Before this code code is called, %eax is pushed to the stack, and the
* interrupt number is loaded into %al
*/
.code16
__interrupt_handler_16bit = RELOCATED(.)
push %ds
push %es
push %fs
push %gs
/* Clean up the interrupt number. We could have done this in the stub,
* but it would have cost 2 more bytes per stub entry.
*/
andl $0xff, %eax
pushl %eax /* ... and make it the first parameter */
/* Switch to protected mode */
movl %cr0, %eax
orl $PE, %eax
movl %eax, %cr0
/* ... and jump to a 32 bit code segment. */
data32 ljmp $0x10, $RELOCATED(1f)
1:
.code32
movw $0x18, %ax
mov %ax, %ds
mov %ax, %es
mov %ax, %fs
mov %ax, %gs
mov %ax, %ss
lidt idtarg
/* Call the C interrupt handler */
movl $interrupt_handler, %eax
call *%eax
/* Now return to real mode ... */
ljmp $0x28, $RELOCATED(1f)
1:
.code16
/* Load the segment registers with properly configured segment
* descriptors. They will retain these configurations (limits,
* writability, etc.) once protected mode is turned off.
*/
mov $0x30, %ax
mov %ax, %ds
mov %ax, %es
mov %ax, %fs
mov %ax, %gs
mov %ax, %ss
/* Disable Protected Mode */
movl %cr0, %eax
andl $~PE, %eax
movl %eax, %cr0
/* Now really going into real mode */
ljmp $0, $RELOCATED(1f)
1:
/* Restore real-mode stack segment */
mov $0x0, %ax
mov %ax, %ss
/* Restore 16-bit IDT */
xor %ax, %ax
mov %ax, %ds
lidt __realmode_idt
/* Set up our segment registers to segment 0x0000 */
mov %ax, %es
mov %ax, %fs
mov %ax, %gs
mov $0x40, %ax
mov %ax, %ds
/* Restore all registers, including those
* manipulated by the C handler
*/
popl %eax
pop %gs
pop %fs
pop %es
pop %ds
popal
iret
.globl __realmode_code_size
__realmode_code_size = (. - __realmode_code)
.code32

244
util/x86emu/x86_interrupts.c
View file

@ -1,244 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2001 Ronald G. Minnich
* Copyright (C) 2005 Nick.Barker9@btinternet.com
* Copyright (C) 2007-2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <string.h>
#ifdef CONFIG_COREBOOT_V2
#include <console/console.h>
#include <arch/io.h>
#define printk(x...) do_printk(x)
#else
#include <console.h>
#include <io.h>
#endif
struct eregs {
uint32_t eax, ecx, edx, ebx, esp, ebp, esi, edi;
uint32_t vector;
uint32_t error_code;
uint32_t eip;
uint32_t cs;
uint32_t eflags;
};
enum {
CHECK = 0xb001,
FINDDEV = 0xb102,
READCONFBYTE = 0xb108,
READCONFWORD = 0xb109,
READCONFDWORD = 0xb10a,
WRITECONFBYTE = 0xb10b,
WRITECONFWORD = 0xb10c,
WRITECONFDWORD = 0xb10d
};
// errors go in AH. Just set these up so that word assigns
// will work. KISS.
enum {
PCIBIOS_NODEV = 0x8600,
PCIBIOS_BADREG = 0x8700
};
int int12_handler(struct eregs *regs)
{
regs->eax = 64 * 1024;
return 0;
}
int int1a_handler(struct eregs *regs)
{
unsigned short func = (unsigned short) regs->eax;
int retval = 0;
unsigned short devid, vendorid, devfn;
/* Use short to get rid of gabage in upper half of 32-bit register */
short devindex;
unsigned char bus;
struct device *dev;
switch(func) {
case CHECK:
regs->edx = 0x4350;
regs->ecx = 0x2049;
retval = 0;
break;
case FINDDEV:
{
devid = regs->ecx;
vendorid = regs->edx;
devindex = regs->esi;
dev = 0;
#ifdef CONFIG_COREBOOT_V2
while ((dev = dev_find_device(vendorid, devid, dev))) {
#else
while ((dev = dev_find_pci_device(vendorid, devid, dev))) {
#endif
if (devindex <= 0)
break;
devindex--;
}
if (dev) {
unsigned short busdevfn;
regs->eax = 0;
// busnum is an unsigned char;
// devfn is an int, so we mask it off.
busdevfn = (dev->bus->secondary << 8)
| (dev->path.pci.devfn & 0xff);
printk(BIOS_DEBUG, "0x%x: return 0x%x\n", func, busdevfn);
regs->ebx = busdevfn;
retval = 0;
} else {
regs->eax = PCIBIOS_NODEV;
retval = -1;
}
}
break;
case READCONFDWORD:
case READCONFWORD:
case READCONFBYTE:
case WRITECONFDWORD:
case WRITECONFWORD:
case WRITECONFBYTE:
{
unsigned long dword;
unsigned short word;
unsigned char byte;
unsigned char reg;
devfn = regs->ebx & 0xff;
bus = regs->ebx >> 8;
reg = regs->edi;
dev = dev_find_slot(bus, devfn);
if (! dev) {
printk(BIOS_DEBUG, "0x%x: BAD DEVICE bus %d devfn 0x%x\n", func, bus, devfn);
// idiots. the pcibios guys assumed you'd never pass a bad bus/devfn!
regs->eax = PCIBIOS_BADREG;
retval = -1;
}
switch(func) {
case READCONFBYTE:
byte = pci_read_config8(dev, reg);
regs->ecx = byte;
break;
case READCONFWORD:
word = pci_read_config16(dev, reg);
regs->ecx = word;
break;
case READCONFDWORD:
dword = pci_read_config32(dev, reg);
regs->ecx = dword;
break;
case WRITECONFBYTE:
byte = regs->ecx;
pci_write_config8(dev, reg, byte);
break;
case WRITECONFWORD:
word = regs->ecx;
pci_write_config16(dev, reg, word);
break;
case WRITECONFDWORD:
dword = regs->ecx;
pci_write_config32(dev, reg, dword);
break;
}
if (retval)
retval = PCIBIOS_BADREG;
printk(BIOS_DEBUG, "0x%x: bus %d devfn 0x%x reg 0x%x val 0x%x\n",
func, bus, devfn, reg, regs->ecx);
regs->eax = 0;
retval = 0;
}
break;
default:
printk(BIOS_ERR, "UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func);
break;
}
return retval;
}
int int15_handler(struct eregs *regs)
{
int res = -1;
/* This int15 handler is VIA Tech. specific. Other chipsets need other
* handlers. The right way to do this is to move this handler code into
* the mainboard or northbridge code.
*/
switch (regs->eax & 0xffff) {
case 0x5f19:
break;
case 0x5f18:
regs->eax = 0x5f;
// MCLK = 133, 32M frame buffer, 256 M main memory
regs->ebx = 0x545;
regs->ecx = 0x060;
res = 0;
break;
case 0x5f00:
regs->eax = 0x8600;
break;
case 0x5f01:
regs->eax = 0x5f;
regs->ecx = (regs->ecx & 0xffffff00 ) | 2; // panel type = 2 = 1024 * 768
res = 0;
break;
case 0x5f02:
regs->eax = 0x5f;
regs->ebx = (regs->ebx & 0xffff0000) | 2;
regs->ecx = (regs->ecx & 0xffff0000) | 0x401; // PAL + crt only
regs->edx = (regs->edx & 0xffff0000) | 0; // TV Layout - default
res = 0;
break;
case 0x5f0f:
regs->eax = 0x860f;
break;
/* And now Intel IGD code */
#define BOOT_DISPLAY_CRT (1 << 0)
#define BOOT_DISPLAY_TV (1 << 1)
#define BOOT_DISPLAY_EFP (1 << 2)
#define BOOT_DISPLAY_LCD (1 << 3)
#define BOOT_DISPLAY_CRT2 (1 << 4)
#define BOOT_DISPLAY_TV2 (1 << 5)
#define BOOT_DISPLAY_EFP2 (1 << 6)
#define BOOT_DISPLAY_LCD2 (1 << 7)
case 0x5f35:
regs->eax = 0x5f;
regs->ecx = BOOT_DISPLAY_LCD|BOOT_DISPLAY_CRT;
res = 0;
break;
case 0x5f40:
regs->eax = 0x5f;
regs->ecx = 3; // This is mainboard specific
printk(BIOS_DEBUG, "DISPLAY=%x\n", regs->ecx);
res = 0;
break;
default:
printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n",
regs->eax & 0xffff);
}
return res;
}

6
util/x86emu/x86emu/debug.c
View file

@ -42,7 +42,7 @@
/*----------------------------- Implementation ----------------------------*/
#ifdef CONFIG_DEBUG
#ifdef DEBUG
static void print_encoded_bytes (u16 s, u16 o);
static void print_decoded_instruction (void);
@ -94,7 +94,7 @@ void disassemble_forward (u16 seg, u16 off, int n)
* flag associated with the "execution", and we are using a copy
* of the register struct. All the major opcodes, once fully
* decoded, have the following two steps: TRACE_REGS(r,m);
* SINGLE_STEP(r,m); which disappear if CONFIG_DEBUG is not defined to
* SINGLE_STEP(r,m); which disappear if DEBUG is not defined to
* the preprocessor. The TRACE_REGS macro expands to:
*
* if (debug&DEBUG_DISASSEMBLE)
@ -364,7 +364,7 @@ int parse_line (char *s, int *ps, int *n)
#endif
}
#endif /* CONFIG_DEBUG */
#endif /* DEBUG */
void x86emu_dump_regs (void)
{

20
util/x86emu/x86emu/debug.h
View file

@ -40,8 +40,8 @@
#ifndef __X86EMU_DEBUG_H
#define __X86EMU_DEBUG_H
//#define CONFIG_DEBUG 0
//#undef CONFIG_DEBUG
//#define DEBUG 0
//#undef DEBUG
/*---------------------- Macros and type definitions ----------------------*/
/* checks to be enabled for "runtime" */
@ -51,7 +51,7 @@
#define CHECK_MEM_ACCESS_F 0x4 /*using regular linear pointer */
#define CHECK_DATA_ACCESS_F 0x8 /*using segment:offset*/
#ifdef CONFIG_DEBUG
#ifdef DEBUG
# define CHECK_IP_FETCH() (M.x86.check & CHECK_IP_FETCH_F)
# define CHECK_SP_ACCESS() (M.x86.check & CHECK_SP_ACCESS_F)
# define CHECK_MEM_ACCESS() (M.x86.check & CHECK_MEM_ACCESS_F)
@ -63,7 +63,7 @@
# define CHECK_DATA_ACCESS()
#endif
#ifdef CONFIG_DEBUG
#ifdef DEBUG
# define DEBUG_INSTRUMENT() (M.x86.debug & DEBUG_INSTRUMENT_F)
# define DEBUG_DECODE() (M.x86.debug & DEBUG_DECODE_F)
# define DEBUG_TRACE() (M.x86.debug & DEBUG_TRACE_F)
@ -106,7 +106,7 @@
# define DEBUG_DECODE_NOPRINT() 0
#endif
#ifdef CONFIG_DEBUG
#ifdef DEBUG
# define DECODE_PRINTF(x) if (DEBUG_DECODE()) \
x86emu_decode_printf(x)
@ -136,7 +136,7 @@
# define SAVE_IP_CS(x,y)
#endif
#ifdef CONFIG_DEBUG
#ifdef DEBUG
#define TRACE_REGS() \
if (DEBUG_DISASSEMBLE()) { \
x86emu_just_disassemble(); \
@ -147,7 +147,7 @@
# define TRACE_REGS()
#endif
#ifdef CONFIG_DEBUG
#ifdef DEBUG
# define SINGLE_STEP() if (DEBUG_STEP()) x86emu_single_step()
#else
# define SINGLE_STEP()
@ -157,7 +157,7 @@
TRACE_REGS(); \
SINGLE_STEP()
#ifdef CONFIG_DEBUG
#ifdef DEBUG
# define START_OF_INSTR()
# define END_OF_INSTR() EndOfTheInstructionProcedure: x86emu_end_instr();
# define END_OF_INSTR_NO_TRACE() x86emu_end_instr();
@ -167,7 +167,7 @@
# define END_OF_INSTR_NO_TRACE()
#endif
#ifdef CONFIG_DEBUG
#ifdef DEBUG
# define CALL_TRACE(u,v,w,x,s) \
if (DEBUG_TRACECALLREGS()) \
x86emu_dump_regs(); \
@ -189,7 +189,7 @@
# define JMP_TRACE(u,v,w,x,s)
#endif
#ifdef CONFIG_DEBUG
#ifdef DEBUG
#define DB(x) x
#else
#define DB(x)

26
util/x86emu/x86emu/decode.c
View file

@ -285,7 +285,7 @@ _INLINE u32 get_data_segment(void)
case SYSMODE_SEGOVR_SS | SYSMODE_SEG_DS_SS:
return M.x86.R_SS;
default:
#ifdef CONFIG_DEBUG
#ifdef DEBUG
printk("error: should not happen: multiple overrides.\n");
#endif
HALT_SYS();
@ -305,7 +305,7 @@ NOTE: Do not inline this function as (*sys_rdX) is already inline!
u8 fetch_data_byte(
uint offset)
{
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access((u16)get_data_segment(), offset);
#endif
@ -324,7 +324,7 @@ NOTE: Do not inline this function as (*sys_rdX) is already inline!
u16 fetch_data_word(
uint offset)
{
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access((u16)get_data_segment(), offset);
#endif
@ -343,7 +343,7 @@ NOTE: Do not inline this function as (*sys_rdX) is already inline!
u32 fetch_data_long(
uint offset)
{
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access((u16)get_data_segment(), offset);
#endif
@ -364,7 +364,7 @@ u8 fetch_data_byte_abs(
uint segment,
uint offset)
{
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access(segment, offset);
#endif
@ -385,7 +385,7 @@ u16 fetch_data_word_abs(
uint segment,
uint offset)
{
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access(segment, offset);
#endif
@ -406,7 +406,7 @@ u32 fetch_data_long_abs(
uint segment,
uint offset)
{
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access(segment, offset);
#endif
@ -428,7 +428,7 @@ void store_data_byte(
uint offset,
u8 val)
{
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access((u16)get_data_segment(), offset);
#endif
@ -450,7 +450,7 @@ void store_data_word(
uint offset,
u16 val)
{
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access((u16)get_data_segment(), offset);
#endif
@ -472,7 +472,7 @@ void store_data_long(
uint offset,
u32 val)
{
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access((u16)get_data_segment(), offset);
#endif
@ -495,7 +495,7 @@ void store_data_byte_abs(
uint offset,
u8 val)
{
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access(segment, offset);
#endif
@ -518,7 +518,7 @@ void store_data_word_abs(
uint offset,
u16 val)
{
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access(segment, offset);
#endif
@ -541,7 +541,7 @@ void store_data_long_abs(
uint offset,
u32 val)
{
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access(segment, offset);
#endif

34
util/x86emu/x86emu/fpu.c
View file

@ -50,7 +50,7 @@ void x86emuOp_esc_coprocess_d8(u8 X86EMU_UNUSED(op1))
END_OF_INSTR_NO_TRACE();
}
#ifdef CONFIG_DEBUG
#ifdef DEBUG
static char *x86emu_fpu_op_d9_tab[] = {
"FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",
@ -89,7 +89,7 @@ static char *x86emu_fpu_op_d9_tab1[] = {
"FRNDINT", "FSCALE", "ESC_D9", "ESC_D9",
};
#endif /* CONFIG_DEBUG */
#endif /* DEBUG */
/* opcode=0xd9 */
void x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1))
@ -100,7 +100,7 @@ void x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1))
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (mod != 3) {
DECODE_PRINTINSTR32(x86emu_fpu_op_d9_tab, mod, rh, rl);
} else {
@ -294,7 +294,7 @@ void x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1))
END_OF_INSTR_NO_TRACE();
}
#ifdef CONFIG_DEBUG
#ifdef DEBUG
char *x86emu_fpu_op_da_tab[] = {
"FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",
@ -316,7 +316,7 @@ char *x86emu_fpu_op_da_tab[] = {
"ESC_DA ", "ESC_DA ", "ESC_DA ", "ESC_DA ",
};
#endif /* CONFIG_DEBUG */
#endif /* DEBUG */
/* opcode=0xda */
void x86emuOp_esc_coprocess_da(u8 X86EMU_UNUSED(op1))
@ -384,7 +384,7 @@ void x86emuOp_esc_coprocess_da(u8 X86EMU_UNUSED(op1))
END_OF_INSTR_NO_TRACE();
}
#ifdef CONFIG_DEBUG
#ifdef DEBUG
char *x86emu_fpu_op_db_tab[] = {
"FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ",
@ -397,7 +397,7 @@ char *x86emu_fpu_op_db_tab[] = {
"ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",
};
#endif /* CONFIG_DEBUG */
#endif /* DEBUG */
/* opcode=0xdb */
void x86emuOp_esc_coprocess_db(u8 X86EMU_UNUSED(op1))
@ -407,7 +407,7 @@ void x86emuOp_esc_coprocess_db(u8 X86EMU_UNUSED(op1))
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (mod != 3) {
DECODE_PRINTINSTR32(x86emu_fpu_op_db_tab, mod, rh, rl);
} else if (rh == 4) { /* === 11 10 0 nnn */
@ -428,7 +428,7 @@ void x86emuOp_esc_coprocess_db(u8 X86EMU_UNUSED(op1))
} else {
DECODE_PRINTF2("ESC_DB %0x\n", (mod << 6) + (rh << 3) + (rl));
}
#endif /* CONFIG_DEBUG */
#endif /* DEBUG */
switch (mod) {
case 0:
destoffset = decode_rm00_address(rl);
@ -504,7 +504,7 @@ void x86emuOp_esc_coprocess_db(u8 X86EMU_UNUSED(op1))
END_OF_INSTR_NO_TRACE();
}
#ifdef CONFIG_DEBUG
#ifdef DEBUG
char *x86emu_fpu_op_dc_tab[] = {
"FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",
"FCOMP\tQWORD PTR ",
@ -524,7 +524,7 @@ char *x86emu_fpu_op_dc_tab[] = {
"FADD\t", "FMUL\t", "FCOM\t", "FCOMP\t",
"FSUBR\t", "FSUB\t", "FDIVR\t", "FDIV\t",
};
#endif /* CONFIG_DEBUG */
#endif /* DEBUG */
/* opcode=0xdc */
void x86emuOp_esc_coprocess_dc(u8 X86EMU_UNUSED(op1))
@ -618,7 +618,7 @@ void x86emuOp_esc_coprocess_dc(u8 X86EMU_UNUSED(op1))
END_OF_INSTR_NO_TRACE();
}
#ifdef CONFIG_DEBUG
#ifdef DEBUG
static char *x86emu_fpu_op_dd_tab[] = {
"FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",
@ -634,7 +634,7 @@ static char *x86emu_fpu_op_dd_tab[] = {
"ESC_DD\t2C,", "ESC_DD\t2D,", "ESC_DD\t2E,", "ESC_DD\t2F,",
};
#endif /* CONFIG_DEBUG */
#endif /* DEBUG */
/* opcode=0xdd */
void x86emuOp_esc_coprocess_dd(u8 X86EMU_UNUSED(op1))
@ -718,7 +718,7 @@ void x86emuOp_esc_coprocess_dd(u8 X86EMU_UNUSED(op1))
END_OF_INSTR_NO_TRACE();
}
#ifdef CONFIG_DEBUG
#ifdef DEBUG
static char *x86emu_fpu_op_de_tab[] =
{
@ -741,7 +741,7 @@ static char *x86emu_fpu_op_de_tab[] =
"FSUBRP\t", "FSUBP\t", "FDIVRP\t", "FDIVP\t",
};
#endif /* CONFIG_DEBUG */
#endif /* DEBUG */
/* opcode=0xde */
void x86emuOp_esc_coprocess_de(u8 X86EMU_UNUSED(op1))
@ -837,7 +837,7 @@ void x86emuOp_esc_coprocess_de(u8 X86EMU_UNUSED(op1))
END_OF_INSTR_NO_TRACE();
}
#ifdef CONFIG_DEBUG
#ifdef DEBUG
static char *x86emu_fpu_op_df_tab[] = {
/* mod == 00 */
@ -860,7 +860,7 @@ static char *x86emu_fpu_op_df_tab[] = {
"ESC_DF\t3C,", "ESC_DF\t3D,", "ESC_DF\t3E,", "ESC_DF\t3F,"
};
#endif /* CONFIG_DEBUG */
#endif /* DEBUG */
/* opcode=0xdf */
void x86emuOp_esc_coprocess_df(u8 X86EMU_UNUSED(op1))

28
util/x86emu/x86emu/ops.c
View file

@ -76,7 +76,7 @@
/* constant arrays to do several instructions in just one function */
#ifdef CONFIG_DEBUG
#ifdef DEBUG
static char *x86emu_GenOpName[8] = {
"ADD", "OR", "ADC", "SBB", "AND", "SUB", "XOR", "CMP"};
#endif
@ -157,7 +157,7 @@ static u32 (*opcD1_long_operation[])(u32 s, u8 d) =
sar_long,
};
#ifdef CONFIG_DEBUG
#ifdef DEBUG
static char *opF6_names[8] =
{ "TEST\t", "", "NOT\t", "NEG\t", "MUL\t", "IMUL\t", "DIV\t", "IDIV\t" };
@ -1287,7 +1287,7 @@ void x86emuOp_opc80_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@ -1363,7 +1363,7 @@ void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@ -1473,7 +1473,7 @@ void x86emuOp_opc82_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@ -1547,7 +1547,7 @@ void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@ -3129,7 +3129,7 @@ void x86emuOp_opcC0_byte_RM_MEM(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@ -3204,7 +3204,7 @@ void x86emuOp_opcC1_word_RM_MEM(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@ -3681,7 +3681,7 @@ void x86emuOp_opcD0_byte_RM_1(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@ -3752,7 +3752,7 @@ void x86emuOp_opcD1_word_RM_1(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@ -3854,7 +3854,7 @@ void x86emuOp_opcD2_byte_RM_CL(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@ -3927,7 +3927,7 @@ void x86emuOp_opcD3_word_RM_CL(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@ -4930,7 +4930,7 @@ void x86emuOp_opcFE_byte_RM(u8 X86EMU_UNUSED(op1))
/* Yet another special case instruction. */
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@ -4996,7 +4996,7 @@ void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
/* Yet another special case instruction. */
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef CONFIG_DEBUG
#ifdef DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings

2
util/x86emu/x86emu/sys.c
View file

@ -46,7 +46,7 @@
#include "debug.h"
#include "prim_ops.h"
#if 1 /* Coreboot needs to map prinkf to printk. */
#ifdef CONFIG_COREBOOT_V2
#ifdef COREBOOT_V2
#include "arch/io.h"
#else
#include "io.h"

12
util/x86emu/yabel/biosemu.c
View file

@ -14,7 +14,7 @@
#include <string.h>
#include <types.h>
#ifndef CONFIG_COREBOOT_V2
#ifndef COREBOOT_V2
#include <cpu.h>
#endif
@ -22,7 +22,7 @@
#include <x86emu/x86emu.h>
#include <x86emu/regs.h>
#ifdef CONFIG_COREBOOT_V2
#ifdef COREBOOT_V2
#include "../x86emu/prim_ops.h"
#else
#include <x86emu/prim_ops.h> // for push_word
@ -35,7 +35,7 @@
#include "device.h"
#include "pmm.h"
#ifdef CONFIG_COREBOOT_V2
#ifdef COREBOOT_V2
#include "compat/rtas.h"
#else
#include <rtas.h>
@ -70,7 +70,7 @@ biosemu(u8 *biosmem, u32 biosmem_size, struct device * dev, unsigned long rom_ad
{
u8 *rom_image;
int i = 0;
#ifdef CONFIG_DEBUG
#ifdef DEBUG
debug_flags = 0;//DEBUG_PRINT_INT10 | DEBUG_PNP | DEBUG_INTR | DEBUG_CHECK_VMEM_ACCESS | DEBUG_MEM | DEBUG_IO;
// | DEBUG_CHECK_VMEM_ACCESS | DEBUG_MEM | DEBUG_IO;
// | DEBUG_TRACE_X86EMU | DEBUG_JMP;
@ -265,7 +265,7 @@ biosemu(u8 *biosmem, u32 biosmem_size, struct device * dev, unsigned long rom_ad
CHECK_DBG(DEBUG_TRACE_X86EMU) {
X86EMU_trace_on();
} else {
#ifdef CONFIG_DEBUG
#ifdef DEBUG
M.x86.debug |= DEBUG_SAVE_IP_CS_F;
M.x86.debug |= DEBUG_DECODE_F;
M.x86.debug |= DEBUG_DECODE_NOPRINT_F;
@ -286,7 +286,7 @@ biosemu(u8 *biosmem, u32 biosmem_size, struct device * dev, unsigned long rom_ad
* some boot device status in AX (see PNP BIOS Spec Section 3.3
*/
DEBUG_PRINTF_CS_IP("Option ROM Exit Status: %04x\n", M.x86.R_AX);
#ifdef CONFIG_DEBUG
#ifdef DEBUG
DEBUG_PRINTF("Exit Status Decode:\n");
if (M.x86.R_AX & 0x100) { // bit 8
DEBUG_PRINTF

2
util/x86emu/yabel/compat/functions.c
View file

@ -14,7 +14,7 @@
*/
#include <types.h>
#ifndef CONFIG_COREBOOT_V2
#ifndef COREBOOT_V2
#include <config.h>
#endif
#include <device/device.h>

2
util/x86emu/yabel/debug.c
View file

@ -11,7 +11,7 @@
* IBM Corporation - initial implementation
*****************************************************************************/
#ifndef CONFIG_COREBOOT_V2
#ifndef COREBOOT_V2
#include <cpu.h>
#endif

10
util/x86emu/yabel/debug.h
View file

@ -20,7 +20,7 @@ extern u32 debug_flags;
extern void x86emu_dump_xregs(void);
/* printf is not available in coreboot... use printk */
#ifdef CONFIG_COREBOOT_V2
#ifdef COREBOOT_V2
#include <console/console.h>
#else
#include <console.h>
@ -73,9 +73,9 @@ static inline void set_ci(void) {};
// set to enable tracing of JMPs in x86emu
#define DEBUG_JMP 0x2000
//#define CONFIG_DEBUG
//#undef CONFIG_DEBUG
#ifdef CONFIG_DEBUG
//#define DEBUG
//#undef DEBUG
#ifdef DEBUG
#define CHECK_DBG(_flag) if (debug_flags & _flag)
@ -107,7 +107,7 @@ static inline void set_ci(void) {};
#define DEBUG_PRINTF_DISK(_x...)
#define DEBUG_PRINTF_PNP(_x...)
#endif //CONFIG_DEBUG
#endif //DEBUG
void dump(u8 * addr, u32 len);

10
util/x86emu/yabel/device.c
View file

@ -13,7 +13,7 @@
#include "device.h"
#ifdef CONFIG_COREBOOT_V2
#ifdef COREBOOT_V2
#include "compat/rtas.h"
#else
#include "rtas.h"
@ -116,7 +116,7 @@ biosemu_dev_get_addr_info(void)
}
// store last entry index of translate_address_array
taa_last_entry = taa_index - 1;
#ifdef CONFIG_DEBUG
#ifdef DEBUG
//dump translate_address_array
printf("translate_address_array: \n");
translate_address_t ta;
@ -199,7 +199,7 @@ biosemu_dev_get_addr_info(void)
}
// store last entry index of translate_address_array
taa_last_entry = taa_index - 1;
#ifdef CONFIG_DEBUG
#ifdef DEBUG
//dump translate_address_array
printf("translate_address_array: \n");
translate_address_t ta;
@ -338,7 +338,7 @@ biosemu_dev_check_exprom(unsigned long rom_base_addr)
memcpy(&pci_ds, (void *) (rom_base_addr + pci_ds_offset),
sizeof(pci_ds));
clr_ci();
#ifdef CONFIG_DEBUG
#ifdef DEBUG
DEBUG_PRINTF("PCI Data Structure @%lx:\n",
rom_base_addr + pci_ds_offset);
dump((void *) &pci_ds, sizeof(pci_ds));
@ -397,7 +397,7 @@ biosemu_dev_init(struct device * device)
{
u8 rval = 0;
//init bios_device struct
#ifdef CONFIG_COREBOOT_V2
#ifdef COREBOOT_V2
DEBUG_PRINTF("%s\n", __func__);
#else
DEBUG_PRINTF("%s(%s)\n", __func__, device->dtsname);

2
util/x86emu/yabel/device.h
View file

@ -15,7 +15,7 @@
#define DEVICE_LIB_H
#include <types.h>
#ifdef CONFIG_COREBOOT_V2
#ifdef COREBOOT_V2
#include <arch/byteorder.h>
#include "compat/of.h"
#else

6
util/x86emu/yabel/interrupt.c
View file

@ -11,7 +11,7 @@
* IBM Corporation - initial implementation
*****************************************************************************/
#ifdef CONFIG_COREBOOT_V2
#ifdef COREBOOT_V2
#include "compat/rtas.h"
#else
#include <rtas.h>
@ -24,7 +24,7 @@
#include "pmm.h"
#include <x86emu/x86emu.h>
#ifdef CONFIG_COREBOOT_V2
#ifdef COREBOOT_V2
#include "../x86emu/prim_ops.h"
#else
#include <x86emu/prim_ops.h>
@ -350,7 +350,7 @@ handleInt1a(void)
__func__, M.x86.R_AX);
/* FixME: support SI != 0 */
#if defined(CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES) && CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES==1
#ifdef CONFIG_COREBOOT_V2
#ifdef COREBOOT_V2
dev = dev_find_device(M.x86.R_DX, M.x86.R_CX, 0);
#else
dev = dev_find_pci_device(M.x86.R_DX, M.x86.R_CX, 0);

2
util/x86emu/yabel/io.c
View file

@ -12,7 +12,7 @@
*****************************************************************************/
#include <types.h>
#ifdef CONFIG_COREBOOT_V2
#ifdef COREBOOT_V2
#include "compat/rtas.h"
#include "compat/time.h"
#else

6
util/x86emu/yabel/mem.c
View file

@ -12,21 +12,21 @@
*****************************************************************************/
#include <types.h>
#ifndef CONFIG_COREBOOT_V2
#ifndef COREBOOT_V2
#include <cpu.h>
#endif
#include "debug.h"
#include "device.h"
#include "x86emu/x86emu.h"
#include "biosemu.h"
#ifdef CONFIG_COREBOOT_V2
#ifdef COREBOOT_V2
#include "compat/time.h"
#else
#include <time.h>
#endif
// define a check for access to certain (virtual) memory regions (interrupt handlers, BIOS Data Area, ...)
#ifdef CONFIG_DEBUG
#ifdef DEBUG
static u8 in_check = 0; // to avoid recursion...
u16 ebda_segment;
u32 ebda_size;

2
util/x86emu/yabel/pmm.c
View file

@ -10,7 +10,7 @@
****************************************************************************/
#include <x86emu/x86emu.h>
#ifdef CONFIG_COREBOOT_V2
#ifdef COREBOOT_V2
#include "../x86emu/prim_ops.h"
#else
#include <x86emu/prim_ops.h>

4
util/x86emu/yabel/vbe.c
View file

@ -13,7 +13,7 @@
#include <string.h>
#include <types.h>
#ifndef CONFIG_COREBOOT_V2
#ifndef COREBOOT_V2
#include <cpu.h>
#endif
@ -21,7 +21,7 @@
#include <x86emu/x86emu.h>
#include <x86emu/regs.h>
#ifdef CONFIG_COREBOOT_V2
#ifdef COREBOOT_V2
#include "../x86emu/prim_ops.h"
#else
#include <x86emu/prim_ops.h> // for push_word