diff --git a/src/soc/intel/pantherlake/chip.h b/src/soc/intel/pantherlake/chip.h
index d6b3aff027..d383d63fa5 100644
--- a/src/soc/intel/pantherlake/chip.h
+++ b/src/soc/intel/pantherlake/chip.h
@@ -76,6 +76,7 @@ enum soc_intel_pantherlake_sku {
 	PTL_SKU_4,
 	PTL_SKU_5,
 	PTL_SKU_6,
+	PTL_SKU_7,
 	WCL_SKU_1,
 	WCL_SKU_2,
 	WCL_SKU_3,
@@ -115,7 +116,7 @@ static const struct soc_intel_pantherlake_power_map {
 	{ PCI_DID_INTEL_PTL_H_ID_4, PTL_CORE_4, TDP_25W, PTL_SKU_6, PTL_TDC_3 },
 	{ PCI_DID_INTEL_PTL_H_ID_5, PTL_CORE_4, TDP_25W, PTL_SKU_4, PTL_TDC_5 },
 	{ PCI_DID_INTEL_PTL_H_ID_6, PTL_CORE_4, TDP_25W, PTL_SKU_4, PTL_TDC_5 },
-	{ PCI_DID_INTEL_PTL_H_ID_7, PTL_CORE_4, TDP_25W, PTL_SKU_4, PTL_TDC_5 },
+	{ PCI_DID_INTEL_PTL_H_ID_7, PTL_CORE_4, TDP_25W, PTL_SKU_7, PTL_TDC_4 },
 	{ PCI_DID_INTEL_PTL_H_ID_8, PTL_CORE_3, TDP_25W, PTL_SKU_2, PTL_TDC_3 },
 	{ PCI_DID_INTEL_WCL_ID_1, WCL_CORE, TDP_15W, WCL_SKU_1, WCL_TDC_1 },
 	{ PCI_DID_INTEL_WCL_ID_2, WCL_CORE, TDP_15W, WCL_SKU_2, WCL_TDC_1 },
diff --git a/src/soc/intel/pantherlake/chipset_ptl.cb b/src/soc/intel/pantherlake/chipset_ptl.cb
index a310a1be3f..e19ca02080 100644
--- a/src/soc/intel/pantherlake/chipset_ptl.cb
+++ b/src/soc/intel/pantherlake/chipset_ptl.cb
@@ -71,6 +71,13 @@ chip soc/intel/pantherlake
 		[VR_DOMAIN_ATOM] = 30 * 4
 	}"
 
+	register "icc_max[PTL_SKU_7]" = "{
+		[VR_DOMAIN_IA] = 90 * 4,
+		[VR_DOMAIN_GT] = 56 * 4,
+		[VR_DOMAIN_SA] = 56 * 4,
+		[VR_DOMAIN_ATOM] = 30 * 4
+	}"
+
 	register "tdc_mode[VR_DOMAIN_IA]" = "TDC_IRMS"
 	register "tdc_time_window_ms[VR_DOMAIN_IA]" = "28000"