diff --git a/src/soc/intel/broadwell/broadwell/reset.h b/src/soc/intel/broadwell/broadwell/reset.h new file mode 100644 index 0000000000..6f21181a0c --- /dev/null +++ b/src/soc/intel/broadwell/broadwell/reset.h @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _BROADWELL_RESET_H_ +#define _BROADWELL_RESET_H_ + +void reset_system(void); + +#endif diff --git a/src/soc/intel/broadwell/reset.c b/src/soc/intel/broadwell/reset.c index 981a6a9ca7..ffd15e7308 100644 --- a/src/soc/intel/broadwell/reset.c +++ b/src/soc/intel/broadwell/reset.c @@ -18,8 +18,19 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include #include #include +#include + +/* + * Soft reset (INIT# to cpu) - write 0x1 to I/O 0x92 + * Soft reset (INIT# to cpu)- write 0x4 to I/0 0xcf9 + * Cold reset (S0->S5->S0) - write 0xe to I/0 0xcf9 + * Warm reset (PLTRST# assertion) - write 0x6 to I/O 0xcf9 + * Global reset (S0->S5->S0 with ME reset) - write 0x6 or 0xe to 0xcf9 but + * with ETR[20] set. + */ void soft_reset(void) { @@ -30,3 +41,11 @@ void hard_reset(void) { outb(0x06, 0xcf9); } + +void reset_system(void) +{ + hard_reset(); + while (1) { + hlt(); + } +}