soc/intel/adl to jsl: Explicitly include static.h for config_of_soc

As per commit 8651731537 ("sconfig: Move config_of_soc from device.h
to static.h"), sources that require access to the devicetree should
directly include static.h so that it can be removed from device.h,
eliminating unnecessary dependencies on static.h for files that only
need the types and function declarations in device.h.

Change-Id: I03e42689487c6d63436d9c2945558073aae87cd1
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84586
Reviewed-by: Jayvik Desai <jayvik@google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/alderlake/acpi.c

@@ -19,6 +19,7 @@
 #include <soc/pm.h>
 #include <soc/soc_chip.h>
 #include <soc/systemagent.h>
+#include <static.h>
 #include <cpu/cpu.h>
 #include <types.h>
 

src/soc/intel/alderlake/chip.c

@@ -20,6 +20,7 @@
 #include <soc/pcie.h>
 #include <soc/ramstage.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 
 #if CONFIG(HAVE_ACPI_TABLES)
 const char *soc_acpi_name(const struct device *dev)

src/soc/intel/alderlake/cpu.c

@@ -24,6 +24,7 @@
 #include <soc/msr.h>
 #include <soc/pci_devs.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 #include <types.h>
 
 enum alderlake_model {

src/soc/intel/alderlake/espi.c

@@ -19,6 +19,7 @@
 #include <soc/pci_devs.h>
 #include <soc/pcr_ids.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 
 void soc_get_gen_io_dec_range(uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES])
 {

src/soc/intel/alderlake/finalize.c

@@ -26,6 +26,7 @@
 #include <soc/soc_chip.h>
 #include <soc/systemagent.h>
 #include <spi-generic.h>
+#include <static.h>
 
 #define CAMERA1_CLK		0x8000 /* Camera 1 Clock */
 #define CAMERA2_CLK		0x8080 /* Camera 2 Clock */

src/soc/intel/alderlake/fsp_params.c

@@ -32,6 +32,7 @@
 #include <soc/pcie.h>
 #include <soc/ramstage.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 #include <stdlib.h>
 #include <string.h>
 #include <types.h>

src/soc/intel/alderlake/pmc.c

@@ -20,6 +20,7 @@
 #include <soc/pci_devs.h>
 #include <soc/pm.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 #include <stdint.h>
 #include <bootstate.h>
 

src/soc/intel/alderlake/pmutil.c

@@ -30,6 +30,7 @@
 #include <soc/pm.h>
 #include <soc/smbus.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 #include <types.h>
 
 /*

src/soc/intel/alderlake/romstage/fsp_params.c

@@ -22,6 +22,7 @@
 #include <soc/pcie.h>
 #include <soc/romstage.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 #include <string.h>
 
 #include "ux.h"

src/soc/intel/alderlake/romstage/graphics.c

@@ -4,6 +4,7 @@
 #include <drivers/intel/gma/i915_reg.h>
 #include <intelblocks/early_graphics.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 
 void early_graphics_soc_panel_init(void)
 {

src/soc/intel/alderlake/systemagent.c

@@ -19,6 +19,7 @@
 #include <soc/soc_chip.h>
 #include <soc/systemagent.h>
 #include <spi_flash.h>
+#include <static.h>
 #include <stddef.h>
 
 /*

src/soc/intel/apollolake/acpi.c

@@ -19,6 +19,7 @@
 #include <soc/nvs.h>
 #include <soc/pci_devs.h>
 #include <soc/systemagent.h>
+#include <static.h>
 
 #include "chip.h"
 

src/soc/intel/apollolake/bootblock/bootblock.c

@@ -22,6 +22,7 @@
 #include <soc/pci_devs.h>
 #include <soc/pm.h>
 #include <spi-generic.h>
+#include <static.h>
 
 static const struct pad_config tpm_spi_configs[] = {
 #if CONFIG(SOC_INTEL_GEMINILAKE)

src/soc/intel/apollolake/chip.c

@@ -35,6 +35,7 @@
 #include <soc/pm.h>
 #include <soc/systemagent.h>
 #include <spi-generic.h>
+#include <static.h>
 #include <timer.h>
 #include <soc/ramstage.h>
 #include <soc/soc_chip.h>

src/soc/intel/apollolake/lpc.c

@@ -6,6 +6,7 @@
 #include <soc/pcr_ids.h>
 #include <soc/pm.h>
 #include <soc/intel/common/block/lpc/lpc_def.h>
+#include <static.h>
 #include "chip.h"
 
 void soc_get_gen_io_dec_range(uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES])

src/soc/intel/apollolake/pmutil.c

@@ -19,6 +19,7 @@
 #include <soc/pm.h>
 #include <soc/smbus.h>
 #include <security/vboot/vbnv.h>
+#include <static.h>
 
 #include "chip.h"
 

src/soc/intel/apollolake/pnpconfig.c

@@ -5,6 +5,7 @@
 #include <intelblocks/pcr.h>
 #include <soc/pci_devs.h>
 #include <soc/pnpconfig.h>
+#include <static.h>
 #include "chip.h"
 
 static const struct pnpconfig perf[] = {

src/soc/intel/baytrail/romstage/pmc.c

@@ -11,6 +11,7 @@
 #include <soc/pci_devs.h>
 #include <soc/pm.h>
 #include <soc/romstage.h>
+#include <static.h>
 #include "../chip.h"
 
 /* This sequence signals the PUNIT to start running. */

src/soc/intel/broadwell/pei_data.c

@@ -6,6 +6,7 @@
 #include <soc/pei_data.h>
 #include <soc/pei_wrapper.h>
 #include <soc/intel/broadwell/chip.h>
+#include <static.h>
 
 static void ABI_X86 send_to_console(unsigned char b)
 {

src/soc/intel/cannonlake/acpi.c

@@ -18,6 +18,7 @@
 #include <soc/pci_devs.h>
 #include <soc/pm.h>
 #include <soc/systemagent.h>
+#include <static.h>
 
 #include "chip.h"
 

src/soc/intel/cannonlake/cpu.c

@@ -15,6 +15,7 @@
 #include <cpu/x86/mtrr.h>
 #include <cpu/intel/microcode.h>
 #include <cpu/intel/common/common.h>
+#include <static.h>
 #include <types.h>
 
 #include "chip.h"

src/soc/intel/cannonlake/finalize.c

@@ -21,6 +21,7 @@
 #include <soc/smbus.h>
 #include <soc/systemagent.h>
 #include <spi-generic.h>
+#include <static.h>
 
 #include "chip.h"
 

src/soc/intel/cannonlake/fsp_params.c

@@ -16,6 +16,7 @@
 #include <soc/intel/common/vbt.h>
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>
+#include <static.h>
 #include <string.h>
 #include <types.h>
 

src/soc/intel/cannonlake/gpio_common.c

@@ -2,6 +2,7 @@
 
 #include <gpio.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 
 /*
  * Routine to perform below operations:

src/soc/intel/cannonlake/lpc.c

@@ -13,6 +13,7 @@
 #include <soc/lpc.h>
 #include <soc/pci_devs.h>
 #include <soc/pcr_ids.h>
+#include <static.h>
 
 #include "chip.h"
 

src/soc/intel/cannonlake/pmc.c

@@ -10,6 +10,7 @@
 #include <intelblocks/rtc.h>
 #include <soc/pci_devs.h>
 #include <soc/pm.h>
+#include <static.h>
 
 #include "chip.h"
 

src/soc/intel/cannonlake/pmutil.c

@@ -23,6 +23,7 @@
 #include <soc/pm.h>
 #include <soc/smbus.h>
 #include <security/vboot/vbnv.h>
+#include <static.h>
 
 #include "chip.h"
 

src/soc/intel/cannonlake/systemagent.c

@@ -9,6 +9,7 @@
 #include <soc/cpu.h>
 #include <soc/iomap.h>
 #include <soc/systemagent.h>
+#include <static.h>
 #include "chip.h"
 
 /*

src/soc/intel/cannonlake/vr_config.c

@@ -5,6 +5,7 @@
 #include <fsp/api.h>
 #include <soc/ramstage.h>
 #include <soc/vr_config.h>
+#include <static.h>
 #include <console/console.h>
 #include <intelblocks/cpulib.h>
 

src/soc/intel/common/block/chip/chip.c

@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <soc/soc_chip.h>
+#include <static.h>
 
 struct soc_intel_common_config *chip_get_common_soc_structure(void)
 {

src/soc/intel/common/block/cpu/cpulib.c

@@ -13,6 +13,7 @@
 #include <intelblocks/msr.h>
 #include <smp/node.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 #include <types.h>
 
 #define CPUID_PROCESSOR_FREQUENCY		0X16

src/soc/intel/common/block/power_limit/power_limit.c

@@ -10,6 +10,7 @@
 #include <soc/pci_devs.h>
 #include <soc/soc_chip.h>
 #include <soc/systemagent.h>
+#include <static.h>
 
 /* Convert time in seconds to POWER_LIMIT_1_TIME MSR value */
 static const u8 power_limit_time_sec_to_msr[] = {

src/soc/intel/elkhartlake/acpi.c

@@ -19,6 +19,7 @@
 #include <soc/pm.h>
 #include <soc/soc_chip.h>
 #include <soc/systemagent.h>
+#include <static.h>
 
 /*
  * List of supported C-states in this processor.

src/soc/intel/elkhartlake/chip.c

@@ -16,6 +16,7 @@
 #include <soc/pcie.h>
 #include <soc/ramstage.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 
 #if CONFIG(HAVE_ACPI_TABLES)
 const char *soc_acpi_name(const struct device *dev)

src/soc/intel/elkhartlake/cpu.c

@@ -14,6 +14,7 @@
 #include <soc/msr.h>
 #include <soc/pci_devs.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 #include <types.h>
 
 bool cpu_soc_is_in_untrusted_mode(void)

src/soc/intel/elkhartlake/espi.c

@@ -14,6 +14,7 @@
 #include <soc/pci_devs.h>
 #include <soc/pcr_ids.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 
 void soc_get_gen_io_dec_range(uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES])
 {

src/soc/intel/elkhartlake/fsp_params.c

@@ -15,6 +15,7 @@
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 #include <types.h>
 
 /* SATA DEVSLP idle timeout default values */

src/soc/intel/elkhartlake/pmc.c

@@ -11,6 +11,7 @@
 #include <soc/pci_devs.h>
 #include <soc/pm.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 
 static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable)
 {

src/soc/intel/elkhartlake/pmutil.c

@@ -24,6 +24,7 @@
 #include <soc/pm.h>
 #include <soc/smbus.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 
 /*
  * SMI

src/soc/intel/elkhartlake/romstage/fsp_params.c

@@ -11,6 +11,7 @@
 #include <soc/pcie.h>
 #include <soc/romstage.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 
 /* ISA Serial Base selection. */
 enum {

src/soc/intel/elkhartlake/systemagent.c

@@ -9,6 +9,7 @@
 #include <soc/iomap.h>
 #include <soc/soc_chip.h>
 #include <soc/systemagent.h>
+#include <static.h>
 
 /*
  * SoC implementation

src/soc/intel/jasperlake/acpi.c

@@ -19,6 +19,7 @@
 #include <soc/pm.h>
 #include <soc/soc_chip.h>
 #include <soc/systemagent.h>
+#include <static.h>
 
 /*
  * List of supported C-states in this processor.

src/soc/intel/jasperlake/chip.c

@@ -16,6 +16,7 @@
 #include <soc/pcie.h>
 #include <soc/ramstage.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 
 #if CONFIG(HAVE_ACPI_TABLES)
 const char *soc_acpi_name(const struct device *dev)

src/soc/intel/jasperlake/cpu.c

@@ -14,6 +14,7 @@
 #include <soc/msr.h>
 #include <soc/pci_devs.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 #include <types.h>
 
 bool cpu_soc_is_in_untrusted_mode(void)

src/soc/intel/jasperlake/espi.c

@@ -14,6 +14,7 @@
 #include <soc/pci_devs.h>
 #include <soc/pcr_ids.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 
 void soc_get_gen_io_dec_range(uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES])
 {

src/soc/intel/jasperlake/finalize.c

@@ -19,6 +19,7 @@
 #include <soc/soc_chip.h>
 #include <soc/systemagent.h>
 #include <spi-generic.h>
+#include <static.h>
 
 #define CAMERA1_CLK		0x8000 /* Camera 1 Clock */
 #define CAMERA2_CLK		0x8080 /* Camera 2 Clock */

src/soc/intel/jasperlake/fsp_params.c

@@ -14,6 +14,7 @@
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 #include <string.h>
 #include <types.h>
 

src/soc/intel/jasperlake/pmc.c

@@ -11,6 +11,7 @@
 #include <soc/pci_devs.h>
 #include <soc/pm.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 
 static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable)
 {

src/soc/intel/jasperlake/pmutil.c

@@ -24,6 +24,7 @@
 #include <soc/smbus.h>
 #include <soc/soc_chip.h>
 #include <security/vboot/vbnv.h>
+#include <static.h>
 
 /*
  * SMI

src/soc/intel/jasperlake/romstage/fsp_params.c

@@ -11,6 +11,7 @@
 #include <soc/pcie.h>
 #include <soc/romstage.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 
 static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
 		const struct soc_intel_jasperlake_config *config)

src/soc/intel/jasperlake/systemagent.c

@@ -11,6 +11,7 @@
 #include <soc/iomap.h>
 #include <soc/soc_chip.h>
 #include <soc/systemagent.h>
+#include <static.h>
 
 /*
  * SoC implementation

src/soc/intel/jasperlake/xhci.c

@@ -4,6 +4,7 @@
 #include <device/mmio.h>
 #include <intelblocks/xhci.h>
 #include <soc/soc_chip.h>
+#include <static.h>
 
 #define XHCI_USB2_PORT_STATUS_REG	0x480
 #define XHCI_USB3_PORT_STATUS_REG	0x500