From 6c7f734f7bceeba3f75d45a18ec9f74254687ae6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Sun, 18 Jan 2026 17:53:45 +0100 Subject: [PATCH] util/amdfwtool: Fix a bug clearing two bits of soft fuse value MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The PSP soft fuse is a 64bit value which does not use address mode bits. Those address mode bits are also part of the soft fuse value, thus must not be hardcoded to 0. Change-Id: I5a3e078800653d15baf1939fdce11a60031b9978 Signed-off-by: Michał Żygowski Reviewed-on: https://review.coreboot.org/c/coreboot/+/90789 Reviewed-by: Patrick Rudolph Tested-by: build bot (Jenkins) --- util/amdfwtool/amdfwtool.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 6c1ec632a6..af24697bca 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -1088,7 +1088,7 @@ static void integrate_psp_firmwares(context *ctx, pspdir->entries[count].rsvd = 0; pspdir->entries[count].size = 0xFFFFFFFF; pspdir->entries[count].addr = fw_table[i].other; - pspdir->entries[count].address_mode = AMD_ADDR_PHYSICAL; + pspdir->entries[count].address_mode = fw_table[i].other >> 62; count++; } else if (fw_table[i].type == AMD_FW_PSP_NVRAM || fw_table[i].type == AMD_RPMC_NVRAM) {