From 6c4e502fddbd939d127b91e5c86b5bbac1c5d2af Mon Sep 17 00:00:00 2001
From: Baozhen Yang <yangbaozhen5@huaqin.corp-partner.google.com>
Date: Wed, 25 Jun 2025 10:12:32 +0800
Subject: [PATCH] mb/google/nissa/var/pujjocento: Reduce PL4 to 38W with no
 battery
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When battery is not present, reduce power limits to below 45W,avoid
inability to enter the system.

To avoid poor efficiency of the adapter, leave a margin and set the
powerlimit to 38W.

This will check the current battery status and configure cpu power
limits using current PD power value.

BUG=b:418695656
BRANCH=None
TEST=
1、built (emerge-nissa coreboot chromeos-bootimage) and push ap firmware
   to dut.
2、Connect 15W machine without battery to 45W adapter and check if it
   starts up properly.
3、Use ec command “cbmem -c | grep PL“ to check if the PL4 value is 38
   watts.
   Log result:[INFO] CPU PL4 = 38 Watts

Change-Id: Iadd43c75ea9235b7ba0e3b97ef460280c13ef1e3
Signed-off-by: Baozhen Yang <yangbaozhen5@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88210
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
---
 .../brya/variants/pujjocento/Makefile.mk      |  1 +
 .../brya/variants/pujjocento/ramstage.c       | 35 +++++++++++++++++++
 2 files changed, 36 insertions(+)
 create mode 100644 src/mainboard/google/brya/variants/pujjocento/ramstage.c

diff --git a/src/mainboard/google/brya/variants/pujjocento/Makefile.mk b/src/mainboard/google/brya/variants/pujjocento/Makefile.mk
index f265e04132..f076cc9af9 100644
--- a/src/mainboard/google/brya/variants/pujjocento/Makefile.mk
+++ b/src/mainboard/google/brya/variants/pujjocento/Makefile.mk
@@ -4,5 +4,6 @@ bootblock-y += gpio.c
 romstage-y += gpio.c
 romstage-y += memory.c
 ramstage-y += gpio.c
+ramstage-y += ramstage.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB) += hda_verb.c
 ramstage-y += variant.c
diff --git a/src/mainboard/google/brya/variants/pujjocento/ramstage.c b/src/mainboard/google/brya/variants/pujjocento/ramstage.c
new file mode 100644
index 0000000000..49441a20d8
--- /dev/null
+++ b/src/mainboard/google/brya/variants/pujjocento/ramstage.c
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/variants.h>
+#include <chip.h>
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+#include <ec/google/chromeec/ec.h>
+#include <intelblocks/power_limit.h>
+
+#define NO_BATTERY_PL4_WATTS_LIMIT	38
+
+void variant_devtree_update(void)
+{
+	struct soc_power_limits_config *soc_config;
+	u32 pl4_watts = NO_BATTERY_PL4_WATTS_LIMIT;
+
+	soc_config = variant_get_soc_power_limit_config();
+	if (soc_config == NULL)
+		return;
+
+	/*
+	 * If battery is not present, reduce power limits to below 45W,
+	 * avoid inability to enter the system.
+	 * To avoid poor efficiency of the adapter, leave a margin and
+	 * set the powerlimit to 38W.
+	 */
+	if (!google_chromeec_is_battery_present()) {
+		/* Adjust PL4 values */
+		printk(BIOS_INFO, "previous PL4 value is %d, override PL4 settings to %d watts\n",
+		       soc_config->tdp_pl4, pl4_watts);
+		soc_config->tdp_pl4 = pl4_watts;
+	}
+}