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soc/mediatek/common: Use polling to reduce eDP HPD wait time

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Some eDP panels assert HPD (Hot Plug Detect) after panel VCC is enabled,
typically around 200ms. To reduce boot time, this commit replaces the
original fixed 200ms delay with polling for the HPD status, shortening
the waiting period to approximately 70ms.

Once the HPD pin is detected high, an additional delay of around 1ms is
introduced to ensure the AUX channel is ready for EDID reading.

BUG=b:434574691,b:439535227,b:439476647
BRANCH=none
TEST=Check firmware display on Navi and Skywalker

Signed-off-by: Bincai Liu <bincai.liu@mediatek.corp-partner.google.com>
Signed-off-by: Vince Liu <vince-wl.liu@mediatek.corp-partner.google.com>
Change-Id: I6702c79416700b44d4bfbc763b6fc6003feb69b5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88864
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
This commit is contained in:
Vince Liu 2025-08-19 18:08:02 +08:00 • committed by Yidi Lin
commit 6ba2df9be5
3 changed files with 5 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

1
src/soc/mediatek/common/display.c
View file

@ -90,7 +90,6 @@ int mtk_display_init(void)
process_panel_quirks(&mtk_edp, panel);
if (panel->disp_path == DISP_PATH_EDP) {
mdelay(200);
if (mtk_edp_init(&mtk_edp, &edid) < 0) {
printk(BIOS_ERR, "%s: Failed to initialize eDP\n", __func__);
return -1;

3
src/soc/mediatek/common/dp/dptx_common.c
View file

@ -549,10 +549,11 @@ int mtk_edp_init(struct mtk_dp *mtk_dp, struct edid *edid)
dptx_init_variable(mtk_dp);
dptx_init_port(mtk_dp);
if (!dptx_hal_hpd_high(mtk_dp)) {
if (!wait_ms(HPD_WAIT_TIMEOUT_MS, dptx_hal_hpd_high(mtk_dp))) {
printk(BIOS_ERR, "HPD is low\n");
return -1;
}
mdelay(WAIT_AUX_READY_TIME_MS);
dptx_check_sinkcap(mtk_dp);

3
src/soc/mediatek/common/dp/include/soc/dptx_common.h
View file

@ -69,6 +69,9 @@
#define MAX_LANECOUNT 4
#define HPD_WAIT_TIMEOUT_MS 200
#define WAIT_AUX_READY_TIME_MS 1
enum {
DP_LANECOUNT_1 = 0x1,
DP_LANECOUNT_2 = 0x2,