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soc/intel/pantherlake: Disable memory training progress bar

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Introduce the disable_progress_bar setting in configuration to allow
disabling the memory training progress bar during firmware
initialization.

BUG=b:418675387
TEST=After setting disable_progress_bar, memory training progress bar
is disabled.

Change-Id: I35e8191df27c0eda634724580514e980bd620136
Signed-off-by: Alok Agarwal <alok.agarwal@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88529
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
alokagar 2025-07-22 10:37:58 +05:30 • committed by Subrata Banik
commit 6a42eb9134
3 changed files with 9 additions and 0 deletions
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3
src/soc/intel/pantherlake/chip.h
View file

@ -653,6 +653,9 @@ struct soc_intel_pantherlake_config {
* for wake will be exposed in ACPI
*/
bool thc_wake_on_touch[NUM_THC];
/* Disable the progress bar during MRC training operations. */
bool disable_progress_bar;
};
typedef struct soc_intel_pantherlake_config config_t;

5
src/soc/intel/pantherlake/romstage/ux.c
View file

@ -5,12 +5,15 @@
#include <fsp/util.h>
#include <timestamp.h>
#include <ux_locales.h>
#include <static.h>
#include <soc/soc_chip.h>
#include "ux.h"
static bool ux_inform_user_of_operation(const char *name, enum ux_locale_msg id,
FSPM_UPD *mupd)
{
const struct soc_intel_pantherlake_config *config = config_of_soc();
timestamp_add_now(TS_ESOL_START);
if (!CONFIG(CHROMEOS_ENABLE_ESOL)) {
@ -45,6 +48,8 @@ static bool ux_inform_user_of_operation(const char *name, enum ux_locale_msg id,
}
m_cfg->VgaInitControl = VGA_INIT_CONTROL_ENABLE;
if (config->disable_progress_bar)
m_cfg->VgaInitControl |= VGA_INIT_DISABLE_ANIMATION;
m_cfg->VbtPtr = (efi_uintn_t)vbt;
m_cfg->VbtSize = vbt_size;
m_cfg->LidStatus = CONFIG(VBOOT_LID_SWITCH) ? get_lid_switch() : CONFIG(RUN_FSP_GOP);

1
src/soc/intel/pantherlake/romstage/ux.h
View file

@ -10,5 +10,6 @@ bool ux_inform_user_of_poweroff_operation(const char *name, FSPM_UPD *mupd);
/* VGA initialization configuration */
#define VGA_INIT_CONTROL_ENABLE BIT(0)
#define VGA_INIT_DISABLE_ANIMATION BIT(4)
#endif /* _SOC_INTEL_PANTHERLAKE_ROMSTAGE_UX_H_ */