From 68ede7b8600038ac41d17ba1362280cb300e36a1 Mon Sep 17 00:00:00 2001 From: Seunghwan Kim Date: Tue, 17 Jun 2025 16:58:01 +0900 Subject: [PATCH] mb/google/nissa/var/meliks: Configure Acoustic noise mitigation Set slow_slew_rate for VCCIA and VCCGT to SLEW_FAST_8 to improve EE noise for meliks. BRANCH=nissa TEST=built firmware and got pass for EE noise test. Change-Id: Ie1a9147736e3effa465134854ecd34554bee6906 Signed-off-by: Seunghwan Kim Reviewed-on: https://review.coreboot.org/c/coreboot/+/88126 Reviewed-by: Subrata Banik Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) Reviewed-by: Edward Doan --- src/mainboard/google/brya/variants/meliks/overridetree.cb | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/src/mainboard/google/brya/variants/meliks/overridetree.cb b/src/mainboard/google/brya/variants/meliks/overridetree.cb index 9595616aaf..057bc74309 100644 --- a/src/mainboard/google/brya/variants/meliks/overridetree.cb +++ b/src/mainboard/google/brya/variants/meliks/overridetree.cb @@ -7,6 +7,13 @@ chip soc/intel/alderlake register "sagv" = "SaGv_Enabled" + # Acoustic settings + register "acoustic_noise_mitigation" = "1" + register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" + register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" + register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" + register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1" + # SOC Aux orientation override: # This is a bitfield that corresponds to up to 4 TCSS ports. # Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2.